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net/mlx5e: Keep HW timestamp stats monotonic across reconfiguration

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`mlx5e_stats_ts_get()` currently selects either DMA or port timestamp
counters based on `tx_ptp_opened`. This flag is intentionally kept set
once the PTP TX queues have been opened so their statistics remain
available after queue teardown. As a result, DMA timestamps are no
longer reported after switching from port timestamping back to DMA
timestamping.

The function also reads statistics only from the currently active
channels and TCs. Reducing the number of channels or TCs can therefore
drop previously accumulated timestamp counters from the reported value.

Read the persistent channel statistics instead and always include DMA
timestamp counters. Once the PTP TX queues have been opened, also
include the port timestamp counters.

This also drops state_lock. It previously protected live channel/PTP
pointers, the new code only reads persistent channel_stats and
ptp_stats via mlx5e_stats_nch_read(), which is already safe for
lockless stats access.

Fixes: 3579032c08 ("net/mlx5e: Implement ethtool hardware timestamping statistics")
Signed-off-by: Carolina Jubran <cjubran@nvidia.com>
Reviewed-by: Shahar Shitrit <shshitrit@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260902193731.3668958-1-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Carolina Jubran 2026-09-02 22:37:31 +03:00 committed by Jakub Kicinski
parent c0c6f4ba8a
commit df99553f84
1 changed files with 20 additions and 31 deletions
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51
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
View File

@ -1199,50 +1199,39 @@ void mlx5e_stats_rmon_get(struct mlx5e_priv *priv,
void mlx5e_stats_ts_get(struct mlx5e_priv *priv,
struct ethtool_ts_stats *ts_stats)
{
int i, j;
u16 nch = mlx5e_stats_nch_read(priv);
int i, tc;
mutex_lock(&priv->state_lock);
ts_stats->pkts = 0;
for (i = 0; i < nch; i++) {
struct mlx5e_channel_stats *channel_stats =
priv->channel_stats[i];
for (tc = 0; tc < priv->max_opened_tc; tc++)
ts_stats->pkts += channel_stats->sq[tc].timestamps;
}
/* Accumulate DMA and port timestamp counters so values stay monotonic
* across channel teardown and mode switches.
*/
if (priv->tx_ptp_opened) {
struct mlx5e_ptp *ptp = priv->channels.ptp;
ts_stats->pkts = 0;
/* Err and Lost stats are only relevant for port timestamping,
* as the DMA layer will always successfully timestamp packets.
*/
ts_stats->err = 0;
ts_stats->lost = 0;
if (!ptp)
goto out;
/* Aggregate stats across all TCs */
for (i = 0; i < ptp->num_tc; i++) {
for (tc = 0; tc < priv->max_opened_tc; tc++) {
struct mlx5e_ptp_cq_stats *stats =
ptp->ptpsq[i].cq_stats;
&priv->ptp_stats.cq[tc];
ts_stats->pkts += stats->cqe;
ts_stats->err += stats->abort + stats->err_cqe +
stats->late_cqe;
stats->late_cqe;
ts_stats->lost += stats->lost_cqe;
}
} else {
/* DMA layer will always successfully timestamp packets. Other
* counters do not make sense for this layer.
*/
ts_stats->pkts = 0;
/* Aggregate stats across all SQs */
for (j = 0; j < priv->channels.num; j++) {
struct mlx5e_channel *c = priv->channels.c[j];
for (i = 0; i < c->num_tc; i++) {
struct mlx5e_sq_stats *stats = c->sq[i].stats;
ts_stats->pkts += stats->timestamps;
}
}
}
out:
mutex_unlock(&priv->state_lock);
}
#define PPORT_PHY_LAYER_OFF(c) \