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ARM: dts: aspeed: catalina: Enable multi-master on additional I2C buses

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Update the device tree to enable `multi-master` mode on I2C buses shared
between the host BMC and the NV module with HMC. This ensures proper bus
arbitration and coordination in multi-master environments, preventing
communication conflicts and improving reliability.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-8-4bd85efeb9b4@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
This commit is contained in:
Potin Lai 2025-03-21 15:26:09 +08:00 committed by Andrew Jeffery
parent 8f58b439c4
commit df89538262
1 changed files with 2 additions and 0 deletions
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2
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts
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@ -815,6 +815,7 @@ ssif-bmc@10 {
&i2c12 {
status = "okay";
multi-master;
// Module 1 FRU EEPROM
eeprom@50 {
@ -825,6 +826,7 @@ eeprom@50 {
&i2c13 {
status = "okay";
multi-master;
// Module 0 FRU EEPROM
eeprom@50 {