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arm64: dts: ti: k3-am654-base-board: add boot phase tags

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The 'bootph-all' tag was added to the dt-schema to describe the various
nodes used during the different phases of bootup with DT. Add the
bootph-all tag to all nodes that are used in the bootloader for the
AM654 reference board.

UARTs used as a console, the SD and eMMC nodes along with the needed
regulators for UHS modes, and the needed nodes for OSPI boot are all
marked with 'bootph-all' to handle the various boot modes the board is
capable of

Signed-off-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250710-65-boot-phases-v2-2-d431deb88783@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Bryan Brattlof 2025-07-10 09:39:00 -05:00 committed by Vignesh Raghavendra
parent 3302e07346
commit df62b42b0f
3 changed files with 19 additions and 0 deletions
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17
arch/arm64/boot/dts/ti/k3-am654-base-board.dts
View File

@ -144,6 +144,7 @@ vtt_supply: regulator-3 {
regulator-boot-on;
vin-supply = <&vcc3v3_io>;
gpio = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
bootph-all;
};
};
@ -155,12 +156,14 @@ AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (AB5) WKUP_UART0_TXD */
AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */
AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
>;
bootph-all;
};
ddr_vtt_pins_default: ddr-vtt-default-pins {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /* WKUP_GPIO0_28 */
>;
bootph-all;
};
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
@ -168,6 +171,7 @@ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
>;
bootph-all;
};
push_button_pins_default: push-button-default-pins {
@ -191,6 +195,7 @@ AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */
AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */
AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
>;
bootph-all;
};
wkup_pca554_default: wkup-pca554-default-pins {
@ -206,6 +211,7 @@ AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) /* (P5) MCU_OSPI1_D2.MCU_UART0_TXD */
AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */
>;
bootph-all;
};
mcu_cpsw_pins_default: mcu-cpsw-default-pins {
@ -248,6 +254,7 @@ AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */
AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */
>;
bootph-all;
};
main_i2c2_pins_default: main-i2c2-default-pins {
@ -281,6 +288,7 @@ AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
>;
bootph-all;
};
main_mmc1_pins_default: main-mmc1-default-pins {
@ -294,6 +302,7 @@ AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
>;
bootph-all;
};
usb1_pins_default: usb1-default-pins {
@ -343,6 +352,7 @@ &main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
bootph-all;
};
&wkup_i2c0 {
@ -368,6 +378,7 @@ vdd_mpu: regulator@60 {
ti,vsel0-state-high;
ti,vsel1-state-high;
ti,enable-vout-discharge;
bootph-all;
};
gpio@38 {
@ -456,6 +467,7 @@ &sdhci0 {
bus-width = <8>;
non-removable;
ti,driver-strength-ohm = <50>;
bootph-all;
};
/*
@ -470,6 +482,7 @@ &sdhci1 {
pinctrl-0 = <&main_mmc1_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
bootph-all;
};
&usb1 {
@ -630,3 +643,7 @@ &cpsw_port1 {
&dss {
status = "disabled";
};
&wkup_gpio0 {
bootph-all;
};

1
arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso
View File

@ -46,6 +46,7 @@ AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
&dwc3_0 {
status = "okay";
bootph-all;
};
&usb0_phy {

1
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso
View File

@ -45,6 +45,7 @@ &dwc3_0 {
<&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */
phys = <&serdes0 PHY_TYPE_USB3 0>;
phy-names = "usb3-phy";
bootph-all;
};
&usb0 {