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drm/rockchip: dsi: fix Non-SNPS PHY power on sequence

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Change-Id: If9f131ec6ebc8b194034bf231ca2bcc120440860
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
This commit is contained in:
WeiYong Bi 2017-08-04 09:09:12 +08:00
parent c4e97a6379
commit deeacfd957
1 changed files with 7 additions and 7 deletions
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14
drivers/gpu/drm/rockchip/dw-mipi-dsi.c
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@ -1112,6 +1112,13 @@ static void rockchip_dsi_pre_init(struct dw_mipi_dsi *dsi)
return;
}
if (dsi->dphy.phy) {
rockchip_dsi_set_hs_clk(dsi);
phy_power_on(dsi->dphy.phy);
} else {
dw_mipi_dsi_get_lane_bps(dsi);
}
pm_runtime_get_sync(dsi->dev);
if (dsi->rst) {
@ -1122,13 +1129,6 @@ static void rockchip_dsi_pre_init(struct dw_mipi_dsi *dsi)
udelay(10);
}
if (dsi->dphy.phy) {
rockchip_dsi_set_hs_clk(dsi);
phy_power_on(dsi->dphy.phy);
} else {
dw_mipi_dsi_get_lane_bps(dsi);
}
dev_info(dsi->dev, "final DSI-Link bandwidth: %u x %d Mbps\n",
dsi->lane_mbps, dsi->lanes);
}