drm/amdgpu: wire up defines, shifts and masks through SI code

To be able to remove as much duplicated defines, the different files
containing definitions, shifts and masks must be properly included.

Once done, the code will be migrated where needed to shifts and masks and
proper defines, before removing useless defines in the end.

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alexandre Demers 2025-03-21 21:46:44 -04:00 committed by Alex Deucher
parent 8e46cabf8e
commit de81b86e96
5 changed files with 44 additions and 5 deletions

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@ -35,6 +35,7 @@
#include "amdgpu_vce.h"
#include "atom.h"
#include "amd_pcie.h"
#include "si_dpm.h"
#include "sid.h"
#include "si_ih.h"
@ -44,17 +45,30 @@
#include "dce_v6_0.h"
#include "si.h"
#include "uvd_v3_1.h"
#include "amdgpu_vkms.h"
#include "uvd/uvd_4_0_d.h"
#include "smu/smu_6_0_d.h"
#include "smu/smu_6_0_sh_mask.h"
#include "gca/gfx_6_0_d.h"
#include "gca/gfx_6_0_sh_mask.h"
#include "oss/oss_1_0_d.h"
#include "oss/oss_1_0_sh_mask.h"
#include "gmc/gmc_6_0_d.h"
#include"gmc/gmc_6_0_sh_mask.h"
#include "dce/dce_6_0_d.h"
#include "uvd/uvd_4_0_d.h"
#include "dce/dce_6_0_sh_mask.h"
#include "bif/bif_3_0_d.h"
#include "bif/bif_3_0_sh_mask.h"
#include "si_enums.h"
#include "amdgpu_dm.h"
#include "amdgpu_vkms.h"
static const u32 tahiti_golden_registers[] =
{

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@ -27,6 +27,8 @@
#include "si.h"
#include "sid.h"
#include "oss/oss_1_0_d.h"
#include "oss/oss_1_0_sh_mask.h"
const u32 sdma_offsets[SDMA_MAX_INSTANCE] =
{
DMA0_REGISTER_OFFSET,

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@ -27,6 +27,7 @@
#include "amdgpu_ih.h"
#include "sid.h"
#include "si_ih.h"
#include "oss/oss_1_0_d.h"
#include "oss/oss_1_0_sh_mask.h"

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@ -30,16 +30,32 @@
#include "amdgpu_atombios.h"
#include "amdgpu_dpm_internal.h"
#include "amd_pcie.h"
#include "sid.h"
#include "r600_dpm.h"
#include "si_dpm.h"
#include "atom.h"
#include "gfx_v6_0.h"
#include "r600_dpm.h"
#include "sid.h"
#include "si_dpm.h"
#include "../include/pptable.h"
#include <linux/math64.h>
#include <linux/seq_file.h>
#include <linux/firmware.h>
#include <legacy_dpm.h>
#include "bif/bif_3_0_d.h"
#include "bif/bif_3_0_sh_mask.h"
#include "dce/dce_6_0_d.h"
#include "dce/dce_6_0_sh_mask.h"
#include "gca/gfx_6_0_d.h"
#include "gca/gfx_6_0_sh_mask.h"
#include"gmc/gmc_6_0_d.h"
#include"gmc/gmc_6_0_sh_mask.h"
#include "smu/smu_6_0_d.h"
#include "smu/smu_6_0_sh_mask.h"
#define MC_CG_ARB_FREQ_F0 0x0a
#define MC_CG_ARB_FREQ_F1 0x0b
#define MC_CG_ARB_FREQ_F2 0x0c

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@ -30,6 +30,12 @@
#include "amdgpu_ucode.h"
#include "sislands_smc.h"
#include "smu/smu_6_0_d.h"
#include "smu/smu_6_0_sh_mask.h"
#include "gca/gfx_6_0_d.h"
#include "gca/gfx_6_0_sh_mask.h"
static int si_set_smc_sram_address(struct amdgpu_device *adev,
u32 smc_address, u32 limit)
{