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drm/amdgpu: Unify PSP TA context

Browse Source 
Remove all TA binary structures and add the specific binary
structure in struct ta_context.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Candice Li 2021-09-08 23:58:59 +08:00 committed by Alex Deucher
parent 9cec53c18a
commit de3a1e3360
8 changed files with 141 additions and 118 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
View File

@ -341,27 +341,34 @@ static int amdgpu_firmware_info(struct drm_amdgpu_info_firmware *fw_info,
switch (query_fw->index) {
case TA_FW_TYPE_PSP_XGMI:
fw_info->ver = adev->psp.ta_fw_version;
fw_info->feature = adev->psp.xgmi.feature_version;
fw_info->feature = adev->psp.xgmi_context.context
.bin_desc.feature_version;
break;
case TA_FW_TYPE_PSP_RAS:
fw_info->ver = adev->psp.ta_fw_version;
fw_info->feature = adev->psp.ras.feature_version;
fw_info->feature = adev->psp.ras_context.context
.bin_desc.feature_version;
break;
case TA_FW_TYPE_PSP_HDCP:
fw_info->ver = adev->psp.ta_fw_version;
fw_info->feature = adev->psp.hdcp.feature_version;
fw_info->feature = adev->psp.hdcp_context.context
.bin_desc.feature_version;
break;
case TA_FW_TYPE_PSP_DTM:
fw_info->ver = adev->psp.ta_fw_version;
fw_info->feature = adev->psp.dtm.feature_version;
fw_info->feature = adev->psp.dtm_context.context
.bin_desc.feature_version;
break;
case TA_FW_TYPE_PSP_RAP:
fw_info->ver = adev->psp.ta_fw_version;
fw_info->feature = adev->psp.rap.feature_version;
fw_info->feature = adev->psp.rap_context.context
.bin_desc.feature_version;
break;
case TA_FW_TYPE_PSP_SECUREDISPLAY:
fw_info->ver = adev->psp.ta_fw_version;
fw_info->feature = adev->psp.securedisplay.feature_version;
fw_info->feature =
adev->psp.securedisplay_context.context.bin_desc
.feature_version;
break;
default:
return -EINVAL;
@ -378,8 +385,8 @@ static int amdgpu_firmware_info(struct drm_amdgpu_info_firmware *fw_info,
fw_info->feature = adev->psp.sos.feature_version;
break;
case AMDGPU_INFO_FW_ASD:
fw_info->ver = adev->psp.asd.fw_version;
fw_info->feature = adev->psp.asd.feature_version;
fw_info->ver = adev->psp.asd_context.bin_desc.fw_version;
fw_info->feature = adev->psp.asd_context.bin_desc.feature_version;
break;
case AMDGPU_INFO_FW_DMCU:
fw_info->ver = adev->dm.dmcu_fw_version;

122
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
View File

@ -803,15 +803,16 @@ static int psp_asd_load(struct psp_context *psp)
* add workaround to bypass it for sriov now.
* TODO: add version check to make it common
*/
if (amdgpu_sriov_vf(psp->adev) || !psp->asd.size_bytes)
if (amdgpu_sriov_vf(psp->adev) || !psp->asd_context.bin_desc.size_bytes)
return 0;
cmd = acquire_psp_cmd_buf(psp);
psp_copy_fw(psp, psp->asd.start_addr, psp->asd.size_bytes);
psp_copy_fw(psp, psp->asd_context.bin_desc.start_addr,
psp->asd_context.bin_desc.size_bytes);
psp_prep_asd_load_cmd_buf(cmd, psp->fw_pri_mc_addr,
psp->asd.size_bytes);
psp->asd_context.bin_desc.size_bytes);
ret = psp_cmd_submit_buf(psp, NULL, cmd,
psp->fence_buf_mc_addr);
@ -900,17 +901,18 @@ int psp_reg_program(struct psp_context *psp, enum psp_reg_prog_id reg,
static void psp_prep_ta_load_cmd_buf(struct psp_gfx_cmd_resp *cmd,
uint64_t ta_bin_mc,
uint32_t ta_bin_size,
struct ta_mem_context *mem_ctx)
struct ta_context *context)
{
cmd->cmd_id = GFX_CMD_ID_LOAD_TA;
cmd->cmd.cmd_load_ta.app_phy_addr_lo = lower_32_bits(ta_bin_mc);
cmd->cmd.cmd_load_ta.app_phy_addr_hi = upper_32_bits(ta_bin_mc);
cmd->cmd.cmd_load_ta.app_len = ta_bin_size;
cmd->cmd.cmd_load_ta.app_len = context->bin_desc.size_bytes;
cmd->cmd.cmd_load_ta.cmd_buf_phy_addr_lo = lower_32_bits(mem_ctx->shared_mc_addr);
cmd->cmd.cmd_load_ta.cmd_buf_phy_addr_hi = upper_32_bits(mem_ctx->shared_mc_addr);
cmd->cmd.cmd_load_ta.cmd_buf_len = mem_ctx->shared_mem_size;
cmd->cmd.cmd_load_ta.cmd_buf_phy_addr_lo =
lower_32_bits(context->mem_context.shared_mc_addr);
cmd->cmd.cmd_load_ta.cmd_buf_phy_addr_hi =
upper_32_bits(context->mem_context.shared_mc_addr);
cmd->cmd.cmd_load_ta.cmd_buf_len = context->mem_context.shared_mem_size;
}
static int psp_ta_init_shared_buf(struct psp_context *psp,
@ -969,7 +971,6 @@ static int psp_ta_invoke(struct psp_context *psp,
}
static int psp_ta_load(struct psp_context *psp,
struct psp_bin_desc *bin_desc,
struct ta_context *context)
{
int ret;
@ -977,12 +978,12 @@ static int psp_ta_load(struct psp_context *psp,
cmd = acquire_psp_cmd_buf(psp);
psp_copy_fw(psp, bin_desc->start_addr, bin_desc->size_bytes);
psp_copy_fw(psp, context->bin_desc.start_addr,
context->bin_desc.size_bytes);
psp_prep_ta_load_cmd_buf(cmd,
psp->fw_pri_mc_addr,
bin_desc->size_bytes,
&context->mem_context);
context);
ret = psp_cmd_submit_buf(psp, NULL, cmd,
psp->fence_buf_mc_addr);
@ -998,7 +999,7 @@ static int psp_ta_load(struct psp_context *psp,
static int psp_xgmi_load(struct psp_context *psp)
{
return psp_ta_load(psp, &psp->xgmi, &psp->xgmi_context.context);
return psp_ta_load(psp, &psp->xgmi_context.context);
}
static int psp_xgmi_unload(struct psp_context *psp)
@ -1042,8 +1043,8 @@ int psp_xgmi_initialize(struct psp_context *psp, bool set_extended_data, bool lo
int ret;
if (!psp->ta_fw ||
!psp->xgmi.size_bytes ||
!psp->xgmi.start_addr)
!psp->xgmi_context.context.bin_desc.size_bytes ||
!psp->xgmi_context.context.bin_desc.start_addr)
return -ENOENT;
if (!load_ta)
@ -1119,7 +1120,7 @@ int psp_xgmi_get_node_id(struct psp_context *psp, uint64_t *node_id)
static bool psp_xgmi_peer_link_info_supported(struct psp_context *psp)
{
return psp->adev->asic_type == CHIP_ALDEBARAN &&
psp->xgmi.feature_version >= 0x2000000b;
psp->xgmi_context.context.bin_desc.feature_version >= 0x2000000b;
}
/*
@ -1288,7 +1289,7 @@ static int psp_ras_init_shared_buf(struct psp_context *psp)
static int psp_ras_load(struct psp_context *psp)
{
return psp_ta_load(psp, &psp->ras, &psp->ras_context.context);
return psp_ta_load(psp, &psp->ras_context.context);
}
static int psp_ras_unload(struct psp_context *psp)
@ -1401,8 +1402,8 @@ static int psp_ras_initialize(struct psp_context *psp)
if (amdgpu_sriov_vf(adev))
return 0;
if (!adev->psp.ras.size_bytes ||
!adev->psp.ras.start_addr) {
if (!adev->psp.ras_context.context.bin_desc.size_bytes ||
!adev->psp.ras_context.context.bin_desc.start_addr) {
dev_info(adev->dev, "RAS: optional ras ta ucode is not available\n");
return 0;
}
@ -1518,8 +1519,9 @@ static int psp_hdcp_init_shared_buf(struct psp_context *psp)
static int psp_hdcp_load(struct psp_context *psp)
{
return psp_ta_load(psp, &psp->hdcp, &psp->hdcp_context.context);
return psp_ta_load(psp, &psp->hdcp_context.context);
}
static int psp_hdcp_initialize(struct psp_context *psp)
{
int ret;
@ -1530,8 +1532,8 @@ static int psp_hdcp_initialize(struct psp_context *psp)
if (amdgpu_sriov_vf(psp->adev))
return 0;
if (!psp->hdcp.size_bytes ||
!psp->hdcp.start_addr) {
if (!psp->hdcp_context.context.bin_desc.size_bytes ||
!psp->hdcp_context.context.bin_desc.start_addr) {
dev_info(psp->adev->dev, "HDCP: optional hdcp ta ucode is not available\n");
return 0;
}
@ -1608,7 +1610,7 @@ static int psp_dtm_init_shared_buf(struct psp_context *psp)
static int psp_dtm_load(struct psp_context *psp)
{
return psp_ta_load(psp, &psp->dtm, &psp->dtm_context.context);
return psp_ta_load(psp, &psp->dtm_context.context);
}
static int psp_dtm_initialize(struct psp_context *psp)
@ -1621,8 +1623,8 @@ static int psp_dtm_initialize(struct psp_context *psp)
if (amdgpu_sriov_vf(psp->adev))
return 0;
if (!psp->dtm.size_bytes ||
!psp->dtm.start_addr) {
if (!psp->dtm_context.context.bin_desc.size_bytes ||
!psp->dtm_context.context.bin_desc.start_addr) {
dev_info(psp->adev->dev, "DTM: optional dtm ta ucode is not available\n");
return 0;
}
@ -1699,7 +1701,7 @@ static int psp_rap_init_shared_buf(struct psp_context *psp)
static int psp_rap_load(struct psp_context *psp)
{
return psp_ta_load(psp, &psp->rap, &psp->rap_context.context);
return psp_ta_load(psp, &psp->rap_context.context);
}
static int psp_rap_unload(struct psp_context *psp)
@ -1718,8 +1720,8 @@ static int psp_rap_initialize(struct psp_context *psp)
if (amdgpu_sriov_vf(psp->adev))
return 0;
if (!psp->rap.size_bytes ||
!psp->rap.start_addr) {
if (!psp->rap_context.context.bin_desc.size_bytes ||
!psp->rap_context.context.bin_desc.start_addr) {
dev_info(psp->adev->dev, "RAP: optional rap ta ucode is not available\n");
return 0;
}
@ -1813,8 +1815,7 @@ static int psp_securedisplay_init_shared_buf(struct psp_context *psp)
static int psp_securedisplay_load(struct psp_context *psp)
{
return psp_ta_load(psp, &psp->securedisplay,
&psp->securedisplay_context.context);
return psp_ta_load(psp, &psp->securedisplay_context.context);
}
static int psp_securedisplay_unload(struct psp_context *psp)
@ -1833,8 +1834,8 @@ static int psp_securedisplay_initialize(struct psp_context *psp)
if (amdgpu_sriov_vf(psp->adev))
return 0;
if (!psp->securedisplay.size_bytes ||
!psp->securedisplay.start_addr) {
if (!psp->securedisplay_context.context.bin_desc.size_bytes ||
!psp->securedisplay_context.context.bin_desc.start_addr) {
dev_info(psp->adev->dev, "SECUREDISPLAY: securedisplay ta ucode is not available\n");
return 0;
}
@ -2783,10 +2784,10 @@ int psp_init_asd_microcode(struct psp_context *psp,
goto out;
asd_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.asd_fw->data;
adev->psp.asd.fw_version = le32_to_cpu(asd_hdr->header.ucode_version);
adev->psp.asd.feature_version = le32_to_cpu(asd_hdr->sos.fw_version);
adev->psp.asd.size_bytes = le32_to_cpu(asd_hdr->header.ucode_size_bytes);
adev->psp.asd.start_addr = (uint8_t *)asd_hdr +
adev->psp.asd_context.bin_desc.fw_version = le32_to_cpu(asd_hdr->header.ucode_version);
adev->psp.asd_context.bin_desc.feature_version = le32_to_cpu(asd_hdr->sos.fw_version);
adev->psp.asd_context.bin_desc.size_bytes = le32_to_cpu(asd_hdr->header.ucode_size_bytes);
adev->psp.asd_context.bin_desc.start_addr = (uint8_t *)asd_hdr +
le32_to_cpu(asd_hdr->header.ucode_array_offset_bytes);
return 0;
out:
@ -3073,40 +3074,43 @@ static int parse_ta_bin_descriptor(struct psp_context *psp,
switch (desc->fw_type) {
case TA_FW_TYPE_PSP_ASD:
psp->asd.fw_version = le32_to_cpu(desc->fw_version);
psp->asd.feature_version = le32_to_cpu(desc->fw_version);
psp->asd.size_bytes = le32_to_cpu(desc->size_bytes);
psp->asd.start_addr = ucode_start_addr;
psp->asd_context.bin_desc.fw_version = le32_to_cpu(desc->fw_version);
psp->asd_context.bin_desc.feature_version = le32_to_cpu(desc->fw_version);
psp->asd_context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes);
psp->asd_context.bin_desc.start_addr = ucode_start_addr;
break;
case TA_FW_TYPE_PSP_XGMI:
psp->xgmi.feature_version = le32_to_cpu(desc->fw_version);
psp->xgmi.size_bytes = le32_to_cpu(desc->size_bytes);
psp->xgmi.start_addr = ucode_start_addr;
psp->xgmi_context.context.bin_desc.feature_version = le32_to_cpu(desc->fw_version);
psp->xgmi_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes);
psp->xgmi_context.context.bin_desc.start_addr = ucode_start_addr;
break;
case TA_FW_TYPE_PSP_RAS:
psp->ras.feature_version = le32_to_cpu(desc->fw_version);
psp->ras.size_bytes = le32_to_cpu(desc->size_bytes);
psp->ras.start_addr = ucode_start_addr;
psp->ras_context.context.bin_desc.feature_version = le32_to_cpu(desc->fw_version);
psp->ras_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes);
psp->ras_context.context.bin_desc.start_addr = ucode_start_addr;
break;
case TA_FW_TYPE_PSP_HDCP:
psp->hdcp.feature_version = le32_to_cpu(desc->fw_version);
psp->hdcp.size_bytes = le32_to_cpu(desc->size_bytes);
psp->hdcp.start_addr = ucode_start_addr;
psp->hdcp_context.context.bin_desc.feature_version = le32_to_cpu(desc->fw_version);
psp->hdcp_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes);
psp->hdcp_context.context.bin_desc.start_addr = ucode_start_addr;
break;
case TA_FW_TYPE_PSP_DTM:
psp->dtm.feature_version = le32_to_cpu(desc->fw_version);
psp->dtm.size_bytes = le32_to_cpu(desc->size_bytes);
psp->dtm.start_addr = ucode_start_addr;
psp->dtm_context.context.bin_desc.feature_version = le32_to_cpu(desc->fw_version);
psp->dtm_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes);
psp->dtm_context.context.bin_desc.start_addr = ucode_start_addr;
break;
case TA_FW_TYPE_PSP_RAP:
psp->rap.feature_version = le32_to_cpu(desc->fw_version);
psp->rap.size_bytes = le32_to_cpu(desc->size_bytes);
psp->rap.start_addr = ucode_start_addr;
psp->rap_context.context.bin_desc.feature_version = le32_to_cpu(desc->fw_version);
psp->rap_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes);
psp->rap_context.context.bin_desc.start_addr = ucode_start_addr;
break;
case TA_FW_TYPE_PSP_SECUREDISPLAY:
psp->securedisplay.feature_version = le32_to_cpu(desc->fw_version);
psp->securedisplay.size_bytes = le32_to_cpu(desc->size_bytes);
psp->securedisplay.start_addr = ucode_start_addr;
psp->securedisplay_context.context.bin_desc.feature_version =
le32_to_cpu(desc->fw_version);
psp->securedisplay_context.context.bin_desc.size_bytes =
le32_to_cpu(desc->size_bytes);
psp->securedisplay_context.context.bin_desc.start_addr =
ucode_start_addr;
break;
default:
dev_warn(psp->adev->dev, "Unsupported TA type: %d\n", desc->fw_type);

23
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
View File

@ -133,9 +133,17 @@ struct psp_xgmi_topology_info {
struct psp_xgmi_node_info nodes[AMDGPU_XGMI_MAX_CONNECTED_NODES];
};
struct psp_bin_desc {
uint32_t fw_version;
uint32_t feature_version;
uint32_t size_bytes;
uint8_t *start_addr;
};
struct psp_asd_context {
bool asd_initialized;
uint32_t session_id;
struct psp_bin_desc bin_desc;
};
struct ta_mem_context {
@ -149,6 +157,7 @@ struct ta_context {
bool initialized;
uint32_t session_id;
struct ta_mem_context mem_context;
struct psp_bin_desc bin_desc;
};
struct ta_cp_context {
@ -266,13 +275,6 @@ struct psp_runtime_boot_cfg_entry {
uint32_t reserved;
};
struct psp_bin_desc {
uint32_t fw_version;
uint32_t feature_version;
uint32_t size_bytes;
uint8_t *start_addr;
};
struct psp_context
{
struct amdgpu_device *adev;
@ -304,7 +306,6 @@ struct psp_context
/* asd firmware */
const struct firmware *asd_fw;
struct psp_bin_desc asd;
/* toc firmware */
const struct firmware *toc_fw;
@ -329,12 +330,6 @@ struct psp_context
/* xgmi ta firmware and buffer */
const struct firmware *ta_fw;
uint32_t ta_fw_version;
struct psp_bin_desc xgmi;
struct psp_bin_desc ras;
struct psp_bin_desc hdcp;
struct psp_bin_desc dtm;
struct psp_bin_desc rap;
struct psp_bin_desc securedisplay;
struct psp_asd_context asd_context;
struct psp_xgmi_context xgmi_context;

6
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
View File

@ -525,9 +525,9 @@ FW_VERSION_ATTR(rlc_srls_fw_version, 0444, gfx.rlc_srls_fw_version);
FW_VERSION_ATTR(mec_fw_version, 0444, gfx.mec_fw_version);
FW_VERSION_ATTR(mec2_fw_version, 0444, gfx.mec2_fw_version);
FW_VERSION_ATTR(sos_fw_version, 0444, psp.sos.fw_version);
FW_VERSION_ATTR(asd_fw_version, 0444, psp.asd.fw_version);
FW_VERSION_ATTR(ta_ras_fw_version, 0444, psp.ras.feature_version);
FW_VERSION_ATTR(ta_xgmi_fw_version, 0444, psp.xgmi.feature_version);
FW_VERSION_ATTR(asd_fw_version, 0444, psp.asd_context.bin_desc.fw_version);
FW_VERSION_ATTR(ta_ras_fw_version, 0444, psp.ras_context.context.bin_desc.feature_version);
FW_VERSION_ATTR(ta_xgmi_fw_version, 0444, psp.xgmi_context.context.bin_desc.feature_version);
FW_VERSION_ATTR(smc_fw_version, 0444, pm.fw_version);
FW_VERSION_ATTR(sdma_fw_version, 0444, sdma.instance[0].fw_version);
FW_VERSION_ATTR(sdma2_fw_version, 0444, sdma.instance[1].fw_version);

9
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
View File

@ -532,9 +532,12 @@ static void amdgpu_virt_populate_vf2pf_ucode_info(struct amdgpu_device *adev)
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_MEC, adev->gfx.mec_fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_MEC2, adev->gfx.mec2_fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_SOS, adev->psp.sos.fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_ASD, adev->psp.asd.fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_TA_RAS, adev->psp.ras.feature_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_TA_XGMI, adev->psp.xgmi.feature_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_ASD,
adev->psp.asd_context.bin_desc.fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_TA_RAS,
adev->psp.ras_context.context.bin_desc.feature_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_TA_XGMI,
adev->psp.xgmi_context.context.bin_desc.feature_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_SMC, adev->pm.fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_SDMA, adev->sdma.instance[0].fw_version);
POPULATE_UCODE_INFO(vf2pf_info, AMD_SRIOV_UCODE_ID_SDMA2, adev->sdma.instance[1].fw_version);

22
drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
View File

@ -84,28 +84,28 @@ static int psp_v10_0_init_microcode(struct psp_context *psp)
ta_hdr = (const struct ta_firmware_header_v1_0 *)
adev->psp.ta_fw->data;
adev->psp.hdcp.feature_version =
adev->psp.hdcp_context.context.bin_desc.feature_version =
le32_to_cpu(ta_hdr->hdcp.fw_version);
adev->psp.hdcp.size_bytes =
adev->psp.hdcp_context.context.bin_desc.size_bytes =
le32_to_cpu(ta_hdr->hdcp.size_bytes);
adev->psp.hdcp.start_addr =
adev->psp.hdcp_context.context.bin_desc.start_addr =
(uint8_t *)ta_hdr +
le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
adev->psp.dtm.feature_version =
adev->psp.dtm_context.context.bin_desc.feature_version =
le32_to_cpu(ta_hdr->dtm.fw_version);
adev->psp.dtm.size_bytes =
adev->psp.dtm_context.context.bin_desc.size_bytes =
le32_to_cpu(ta_hdr->dtm.size_bytes);
adev->psp.dtm.start_addr =
(uint8_t *)adev->psp.hdcp.start_addr +
adev->psp.dtm_context.context.bin_desc.start_addr =
(uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
le32_to_cpu(ta_hdr->dtm.offset_bytes);
adev->psp.securedisplay.feature_version =
adev->psp.securedisplay_context.context.bin_desc.feature_version =
le32_to_cpu(ta_hdr->securedisplay.fw_version);
adev->psp.securedisplay.size_bytes =
adev->psp.securedisplay_context.context.bin_desc.size_bytes =
le32_to_cpu(ta_hdr->securedisplay.size_bytes);
adev->psp.securedisplay.start_addr =
(uint8_t *)adev->psp.hdcp.start_addr +
adev->psp.securedisplay_context.context.bin_desc.start_addr =
(uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
le32_to_cpu(ta_hdr->securedisplay.offset_bytes);
adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);

40
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
View File

@ -151,14 +151,20 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
goto out2;
ta_hdr = (const struct ta_firmware_header_v1_0 *)adev->psp.ta_fw->data;
adev->psp.xgmi.feature_version = le32_to_cpu(ta_hdr->xgmi.fw_version);
adev->psp.xgmi.size_bytes = le32_to_cpu(ta_hdr->xgmi.size_bytes);
adev->psp.xgmi.start_addr = (uint8_t *)ta_hdr +
adev->psp.xgmi_context.context.bin_desc.feature_version =
le32_to_cpu(ta_hdr->xgmi.fw_version);
adev->psp.xgmi_context.context.bin_desc.size_bytes =
le32_to_cpu(ta_hdr->xgmi.size_bytes);
adev->psp.xgmi_context.context.bin_desc.start_addr =
(uint8_t *)ta_hdr +
le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
adev->psp.ras.feature_version = le32_to_cpu(ta_hdr->ras.fw_version);
adev->psp.ras.size_bytes = le32_to_cpu(ta_hdr->ras.size_bytes);
adev->psp.ras.start_addr = (uint8_t *)adev->psp.xgmi.start_addr +
adev->psp.ras_context.context.bin_desc.feature_version =
le32_to_cpu(ta_hdr->ras.fw_version);
adev->psp.ras_context.context.bin_desc.size_bytes =
le32_to_cpu(ta_hdr->ras.size_bytes);
adev->psp.ras_context.context.bin_desc.start_addr =
(uint8_t *)adev->psp.xgmi_context.context.bin_desc.start_addr +
le32_to_cpu(ta_hdr->ras.offset_bytes);
}
break;
@ -186,16 +192,24 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
goto out2;
ta_hdr = (const struct ta_firmware_header_v1_0 *)adev->psp.ta_fw->data;
adev->psp.hdcp.feature_version = le32_to_cpu(ta_hdr->hdcp.fw_version);
adev->psp.hdcp.size_bytes = le32_to_cpu(ta_hdr->hdcp.size_bytes);
adev->psp.hdcp.start_addr = (uint8_t *)ta_hdr +
le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
adev->psp.hdcp_context.context.bin_desc.feature_version =
le32_to_cpu(ta_hdr->hdcp.fw_version);
adev->psp.hdcp_context.context.bin_desc.size_bytes =
le32_to_cpu(ta_hdr->hdcp.size_bytes);
adev->psp.hdcp_context.context.bin_desc.start_addr =
(uint8_t *)ta_hdr +
le32_to_cpu(
ta_hdr->header.ucode_array_offset_bytes);
adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
adev->psp.dtm.feature_version = le32_to_cpu(ta_hdr->dtm.fw_version);
adev->psp.dtm.size_bytes = le32_to_cpu(ta_hdr->dtm.size_bytes);
adev->psp.dtm.start_addr = (uint8_t *)adev->psp.hdcp.start_addr +
adev->psp.dtm_context.context.bin_desc.feature_version =
le32_to_cpu(ta_hdr->dtm.fw_version);
adev->psp.dtm_context.context.bin_desc.size_bytes =
le32_to_cpu(ta_hdr->dtm.size_bytes);
adev->psp.dtm_context.context.bin_desc.start_addr =
(uint8_t *)adev->psp.hdcp_context.context
.bin_desc.start_addr +
le32_to_cpu(ta_hdr->dtm.offset_bytes);
}
break;

14
drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
View File

@ -84,22 +84,22 @@ static int psp_v12_0_init_microcode(struct psp_context *psp)
ta_hdr = (const struct ta_firmware_header_v1_0 *)
adev->psp.ta_fw->data;
adev->psp.hdcp.feature_version =
adev->psp.hdcp_context.context.bin_desc.feature_version =
le32_to_cpu(ta_hdr->hdcp.fw_version);
adev->psp.hdcp.size_bytes =
adev->psp.hdcp_context.context.bin_desc.size_bytes =
le32_to_cpu(ta_hdr->hdcp.size_bytes);
adev->psp.hdcp.start_addr =
adev->psp.hdcp_context.context.bin_desc.start_addr =
(uint8_t *)ta_hdr +
le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
adev->psp.dtm.feature_version =
adev->psp.dtm_context.context.bin_desc.feature_version =
le32_to_cpu(ta_hdr->dtm.fw_version);
adev->psp.dtm.size_bytes =
adev->psp.dtm_context.context.bin_desc.size_bytes =
le32_to_cpu(ta_hdr->dtm.size_bytes);
adev->psp.dtm.start_addr =
(uint8_t *)adev->psp.hdcp.start_addr +
adev->psp.dtm_context.context.bin_desc.start_addr =
(uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
le32_to_cpu(ta_hdr->dtm.offset_bytes);
}