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KVM: x86: Advertise AVX512 Bit Matrix Multiply (BMM) to userspace

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Advertise AVX512 Bit Matrix Multiply (BMM) and Bit Reversal instructions to
userspace via CPUID leaf 0x80000021_EAX[23]. This feature enables bit
matrix multiply operations and bit reversal.  Like most AVX instructions,
there are no intercept controls for individual instructions, and no extra
work is needed in KVM to enable correct execution of the instructions in
the guest.

The instructions and CPUID feature are first described in:

  AMD64 Bit Matrix Multiply and Bit Reversal Instructions
  Publication #69192 Revision: 1.00
  Issue Date: January 2026

While at it, reorder PREFETCHI in KVM's initialization sequence to match
the CPUID bit position order for better organization.

Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
Link: https://patch.msgid.link/20260210053511.1612505-1-nikunj@amd.com
[sean: massage changelog]
Signed-off-by: Sean Christopherson <seanjc@google.com>
This commit is contained in:
Nikunj A Dadhania 2026-02-10 05:35:11 +00:00 committed by Sean Christopherson
parent 55be358e17
commit de0bfdc713
2 changed files with 3 additions and 1 deletions
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1
arch/x86/include/asm/cpufeatures.h
View File

@ -473,6 +473,7 @@
#define X86_FEATURE_GP_ON_USER_CPUID (20*32+17) /* User CPUID faulting */
#define X86_FEATURE_PREFETCHI (20*32+20) /* Prefetch Data/Instruction to Cache Level */
#define X86_FEATURE_AVX512_BMM (20*32+23) /* AVX512 Bit Matrix Multiply instructions */
#define X86_FEATURE_ERAPS (20*32+24) /* Enhanced Return Address Predictor Security */
#define X86_FEATURE_SBPB (20*32+27) /* Selective Branch Prediction Barrier */
#define X86_FEATURE_IBPB_BRTYPE (20*32+28) /* MSR_PRED_CMD[IBPB] flushes all branch type predictions */

3
arch/x86/kvm/cpuid.c
View File

@ -1243,11 +1243,12 @@ void kvm_initialize_cpu_caps(void)
F(NULL_SEL_CLR_BASE),
/* UpperAddressIgnore */
F(AUTOIBRS),
F(PREFETCHI),
EMULATED_F(NO_SMM_CTL_MSR),
/* PrefetchCtlMsr */
/* GpOnUserCpuid */
/* EPSF */
F(PREFETCHI),
F(AVX512_BMM),
F(ERAPS),
SYNTHESIZED_F(SBPB),
SYNTHESIZED_F(IBPB_BRTYPE),