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net/mlx5: Add sd_group_size bits for SD management
Currently, mlx5 is querying the MPIR register to get the number of PFs that should comprise the SD group. However, this register does not reflect the correct number in complex deployments. Hence, add an sd_group_size field to nic_vport_context to determine the correct number of PFs, and add an sd_group_size capability bit to indicate whether FW supports it. Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Link: https://patch.msgid.link/20260529052359.389413-3-tariqt@nvidia.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
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@ -1986,7 +1986,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
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u8 basic_cyclic_rcv_wqe[0x1];
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u8 reserved_at_381[0x2];
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u8 log_max_rmp[0x5];
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u8 reserved_at_388[0x3];
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u8 sd_group_size[0x1];
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u8 reserved_at_389[0x2];
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u8 log_max_rqt[0x5];
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u8 reserved_at_390[0x3];
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u8 log_max_rqt_size[0x5];
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@ -4469,7 +4470,9 @@ struct mlx5_ifc_nic_vport_context_bits {
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u8 reserved_at_100[0x1];
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u8 sd_group[0x3];
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u8 reserved_at_104[0x1c];
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u8 reserved_at_104[0x4];
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u8 sd_group_size[0x8];
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u8 reserved_at_110[0x10];
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u8 reserved_at_120[0x10];
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u8 mtu[0x10];
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