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pds_core: order completion reads after the ownership check
pdsc_process_adminq() and pdsc_process_notifyq() decide a completion is
valid from its ownership field - the color bit for the adminq, the event
id for the notifyq - then read the rest of the descriptor, with no
barrier in between.
On a weakly ordered architecture the CPU may read the payload first. Add
dma_rmb() between the ownership read and the payload reads.
Fixes: 7e82a8745b ("pds_core: Prevent race issues involving the adminq")
Reported-by: sashiko-bot <sashiko-bot@kernel.org>
Closes: https://sashiko.dev/#/patchset/20260629200358.2626129-1-nikhil.rao%40amd.com?part=2
Signed-off-by: Nikhil P. Rao <nikhil.rao@amd.com>
Reviewed-by: Eric Joyner <eric.joyner@amd.com>
Link: https://patch.msgid.link/20260714204145.1782390-1-nikhil.rao@amd.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -18,7 +18,13 @@ static int pdsc_process_notifyq(struct pdsc_qcq *qcq)
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comp = cq_info->comp;
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eid = le64_to_cpu(comp->event.eid);
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while (eid > pdsc->last_eid) {
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u16 ecode = le16_to_cpu(comp->event.ecode);
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u16 ecode;
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/* Order the payload read after the event id, the field the
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* driver uses to detect a new completion.
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*/
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dma_rmb();
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ecode = le16_to_cpu(comp->event.ecode);
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switch (ecode) {
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case PDS_EVENT_LINK_CHANGE:
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@ -101,6 +107,10 @@ void pdsc_process_adminq(struct pdsc_qcq *qcq)
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spin_lock_irqsave(&pdsc->adminq_lock, irqflags);
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comp = cq->info[cq->tail_idx].comp;
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while (pdsc_color_match(comp->color, cq->done_color)) {
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/* Order the payload reads after the color bit, the field the
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* driver uses to detect a new completion.
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*/
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dma_rmb();
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q_info = &q->info[q->tail_idx];
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q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1);
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