mirror of
https://github.com/torvalds/linux.git
synced 2026-05-25 07:33:19 +02:00
accel/ivpu: Add platform detection for presilicon
Use highest buttress VPU_STATUS register bits(15:13) that encode platform type as follows: 0 - Silicon 2 - Simics 3 - FPGA 4 - Hybrid SLE Remove old DMI based method. Signed-off-by: Karol Wachowski <karol.wachowski@intel.com> Signed-off-by: Maciej Falkowski <maciej.falkowski@linux.intel.com> Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250107173238.381120-14-maciej.falkowski@linux.intel.com
This commit is contained in:
parent
dad945c27a
commit
dd4f78ec6a
|
|
@ -58,6 +58,7 @@
|
|||
#define IVPU_PLATFORM_SILICON 0
|
||||
#define IVPU_PLATFORM_SIMICS 2
|
||||
#define IVPU_PLATFORM_FPGA 3
|
||||
#define IVPU_PLATFORM_HSLE 4
|
||||
#define IVPU_PLATFORM_INVALID 8
|
||||
|
||||
#define IVPU_SCHED_MODE_AUTO -1
|
||||
|
|
@ -288,7 +289,8 @@ static inline bool ivpu_is_simics(struct ivpu_device *vdev)
|
|||
|
||||
static inline bool ivpu_is_fpga(struct ivpu_device *vdev)
|
||||
{
|
||||
return ivpu_get_platform(vdev) == IVPU_PLATFORM_FPGA;
|
||||
return ivpu_get_platform(vdev) == IVPU_PLATFORM_FPGA ||
|
||||
ivpu_get_platform(vdev) == IVPU_PLATFORM_HSLE;
|
||||
}
|
||||
|
||||
static inline bool ivpu_is_force_snoop_enabled(struct ivpu_device *vdev)
|
||||
|
|
|
|||
|
|
@ -19,38 +19,31 @@ static char *platform_to_str(u32 platform)
|
|||
return "SIMICS";
|
||||
case IVPU_PLATFORM_FPGA:
|
||||
return "FPGA";
|
||||
case IVPU_PLATFORM_HSLE:
|
||||
return "HSLE";
|
||||
default:
|
||||
return "Invalid platform";
|
||||
}
|
||||
}
|
||||
|
||||
static const struct dmi_system_id dmi_platform_simulation[] = {
|
||||
{
|
||||
.ident = "Intel Simics",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_NAME, "lnlrvp"),
|
||||
DMI_MATCH(DMI_BOARD_VERSION, "1.0"),
|
||||
DMI_MATCH(DMI_BOARD_SERIAL, "123456789"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "Intel Simics",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_NAME, "Simics"),
|
||||
},
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
static void platform_init(struct ivpu_device *vdev)
|
||||
{
|
||||
if (dmi_check_system(dmi_platform_simulation))
|
||||
vdev->platform = IVPU_PLATFORM_SIMICS;
|
||||
else
|
||||
vdev->platform = IVPU_PLATFORM_SILICON;
|
||||
int platform = ivpu_hw_btrs_platform_read(vdev);
|
||||
|
||||
ivpu_dbg(vdev, MISC, "Platform type: %s (%d)\n",
|
||||
platform_to_str(vdev->platform), vdev->platform);
|
||||
ivpu_dbg(vdev, MISC, "Platform type: %s (%d)\n", platform_to_str(platform), platform);
|
||||
|
||||
switch (platform) {
|
||||
case IVPU_PLATFORM_SILICON:
|
||||
case IVPU_PLATFORM_SIMICS:
|
||||
case IVPU_PLATFORM_FPGA:
|
||||
case IVPU_PLATFORM_HSLE:
|
||||
vdev->platform = platform;
|
||||
break;
|
||||
|
||||
default:
|
||||
ivpu_err(vdev, "Invalid platform type: %d\n", platform);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void wa_init(struct ivpu_device *vdev)
|
||||
|
|
|
|||
|
|
@ -887,3 +887,10 @@ void ivpu_hw_btrs_diagnose_failure(struct ivpu_device *vdev)
|
|||
else
|
||||
return diagnose_failure_lnl(vdev);
|
||||
}
|
||||
|
||||
int ivpu_hw_btrs_platform_read(struct ivpu_device *vdev)
|
||||
{
|
||||
u32 reg = REGB_RD32(VPU_HW_BTRS_LNL_VPU_STATUS);
|
||||
|
||||
return REG_GET_FLD(VPU_HW_BTRS_LNL_VPU_STATUS, PLATFORM, reg);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -46,5 +46,6 @@ void ivpu_hw_btrs_global_int_disable(struct ivpu_device *vdev);
|
|||
void ivpu_hw_btrs_irq_enable(struct ivpu_device *vdev);
|
||||
void ivpu_hw_btrs_irq_disable(struct ivpu_device *vdev);
|
||||
void ivpu_hw_btrs_diagnose_failure(struct ivpu_device *vdev);
|
||||
int ivpu_hw_btrs_platform_read(struct ivpu_device *vdev);
|
||||
|
||||
#endif /* __IVPU_HW_BTRS_H__ */
|
||||
|
|
|
|||
|
|
@ -86,6 +86,7 @@
|
|||
#define VPU_HW_BTRS_LNL_VPU_STATUS_POWER_RESOURCE_OWN_ACK_MASK BIT_MASK(7)
|
||||
#define VPU_HW_BTRS_LNL_VPU_STATUS_PERF_CLK_MASK BIT_MASK(11)
|
||||
#define VPU_HW_BTRS_LNL_VPU_STATUS_DISABLE_CLK_RELINQUISH_MASK BIT_MASK(12)
|
||||
#define VPU_HW_BTRS_LNL_VPU_STATUS_PLATFORM_MASK GENMASK(31, 29)
|
||||
|
||||
#define VPU_HW_BTRS_LNL_IP_RESET 0x00000160u
|
||||
#define VPU_HW_BTRS_LNL_IP_RESET_TRIGGER_MASK BIT_MASK(0)
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user