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ASoC: Intel: cht_bsw_rt5672: Fix MCLK leak on platform_clock_control error
If snd_soc_dai_set_pll() or snd_soc_dai_set_sysclk() fail inside the EVENT_ON path, the function returns without calling clk_disable_unprepare() on ctx->mclk, which was already enabled earlier in the same code path. Add the missing clk_disable_unprepare() calls before returning the error. Signed-off-by: Aravind Anilraj <aravindanilraj0702@gmail.com> Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://patch.msgid.link/20260401220507.23557-4-aravindanilraj0702@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -77,6 +77,8 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w,
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CHT_PLAT_CLK_3_HZ, 48000 * 512);
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if (ret < 0) {
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dev_err(card->dev, "can't set codec pll: %d\n", ret);
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if (ctx->mclk)
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clk_disable_unprepare(ctx->mclk);
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return ret;
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}
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@ -85,6 +87,8 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w,
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48000 * 512, SND_SOC_CLOCK_IN);
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if (ret < 0) {
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dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
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if (ctx->mclk)
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clk_disable_unprepare(ctx->mclk);
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return ret;
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}
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} else {
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