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arm64: dts: rockchip: rk3588s: Add opp table for cpu

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Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I0caea1e9f4290a113861eb0a17467fd860fd55a7
This commit is contained in:
Finley Xiao 2021-11-09 16:18:13 +08:00 committed by Tao Huang
parent fb678bd98a
commit dc74ddc4ec
1 changed files with 101 additions and 0 deletions
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101
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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@ -92,6 +92,7 @@ cpu_l0: cpu@0 {
enable-method = "psci";
capacity-dmips-mhz = <530>;
clocks = <&cru ARMCLK_L>;
operating-points-v2 = <&cluster0_opp_table>;
};
cpu_l1: cpu@100 {
@ -101,6 +102,7 @@ cpu_l1: cpu@100 {
enable-method = "psci";
capacity-dmips-mhz = <530>;
clocks = <&cru ARMCLK_L>;
operating-points-v2 = <&cluster0_opp_table>;
};
cpu_l2: cpu@200 {
@ -110,6 +112,7 @@ cpu_l2: cpu@200 {
enable-method = "psci";
capacity-dmips-mhz = <530>;
clocks = <&cru ARMCLK_L>;
operating-points-v2 = <&cluster0_opp_table>;
};
cpu_l3: cpu@300 {
@ -119,6 +122,7 @@ cpu_l3: cpu@300 {
enable-method = "psci";
capacity-dmips-mhz = <530>;
clocks = <&cru ARMCLK_L>;
operating-points-v2 = <&cluster0_opp_table>;
};
cpu_b0: cpu@400 {
@ -128,6 +132,7 @@ cpu_b0: cpu@400 {
enable-method = "psci";
capacity-dmips-mhz = <1024>;
clocks = <&cru ARMCLK_B01>;
operating-points-v2 = <&cluster1_opp_table>;
};
cpu_b1: cpu@500 {
@ -137,6 +142,7 @@ cpu_b1: cpu@500 {
enable-method = "psci";
capacity-dmips-mhz = <1024>;
clocks = <&cru ARMCLK_B01>;
operating-points-v2 = <&cluster1_opp_table>;
};
cpu_b2: cpu@600 {
@ -146,6 +152,7 @@ cpu_b2: cpu@600 {
enable-method = "psci";
capacity-dmips-mhz = <1024>;
clocks = <&cru ARMCLK_B23>;
operating-points-v2 = <&cluster2_opp_table>;
};
cpu_b3: cpu@700 {
@ -155,6 +162,100 @@ cpu_b3: cpu@700 {
enable-method = "psci";
capacity-dmips-mhz = <1024>;
clocks = <&cru ARMCLK_B23>;
operating-points-v2 = <&cluster2_opp_table>;
};
};
cluster0_opp_table: cluster0-opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <750000 750000 950000>,
<750000 750000 950000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <750000 750000 950000>,
<750000 750000 950000>;
clock-latency-ns = <40000>;
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <750000 750000 950000>,
<750000 750000 950000>;
clock-latency-ns = <40000>;
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <750000 750000 950000>,
<750000 750000 950000>;
clock-latency-ns = <40000>;
};
};
cluster1_opp_table: cluster1-opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <750000 750000 950000>,
<750000 750000 950000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <750000 750000 950000>,
<750000 750000 950000>;
clock-latency-ns = <40000>;
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <750000 750000 950000>,
<750000 750000 950000>;
clock-latency-ns = <40000>;
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <750000 750000 950000>,
<750000 750000 950000>;
clock-latency-ns = <40000>;
};
};
cluster2_opp_table: cluster2-opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <750000 750000 950000>,
<750000 750000 950000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <750000 750000 950000>,
<750000 750000 950000>;
clock-latency-ns = <40000>;
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <750000 750000 950000>,
<750000 750000 950000>;
clock-latency-ns = <40000>;
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <750000 750000 950000>,
<750000 750000 950000>;
clock-latency-ns = <40000>;
};
};