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spi: zynq-qspi: fix address buffer corruption and support 4-byte address
In zynq_qspi_exec_mem_op(), when transmitting address bytes, the driver
iterates over op->addr.nbytes and populates xqspi->txbuf[i]. However,
xqspi->txbuf is never re-assigned before populating the address, meaning
it still points to (u8 *)&op->cmd.opcode from the command phase.
This causes two severe issues:
1. Memory corruption: Writing into xqspi->txbuf writes past the opcode
buffer on the stack (which was passed as const struct spi_mem_op *).
If opcode is zero, xqspi->txbuf is uninitialized.
2. In zynq_qspi_supports_op(), operations with op->addr.nbytes > 3 are
rejected. When paired with SPI NOR flashes larger than 16MB (such as
Winbond W25Q256), spi_nor_spimem_check_read_pp_op() tests 4-byte address
support, which fails and causes spi_nor_select_read() to drop all read
capabilities, failing probe with -EINVAL (-22).
The Zynq-7000 QSPI controller hardware in manual I/O mode natively supports
transmitting 1 to 4 address bytes via its TXD FIFO registers
(ZYNQ_QSPI_TXD_00_00_OFFSET).
Fix this by introducing a local opaddr[4] buffer in zynq_qspi_exec_mem_op()
and explicitly setting xqspi->txbuf = opaddr before populating address
bytes. Also allow up to 4 address bytes in zynq_qspi_supports_op().
Fixes: 67dca5e580 ("spi: spi-mem: Add support for Zynq QSPI controller")
Cc: stable@vger.kernel.org
Signed-off-by: Pufan Jin <cyan2254650260@gmail.com>
Link: https://patch.msgid.link/20261016130812.282624-1-cyan2254650260@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
d5acef12e8
commit
dc5ca34f5e
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@ -229,11 +229,10 @@ static bool zynq_qspi_supports_op(struct spi_mem *mem,
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return false;
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/*
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* The number of address bytes should be equal to or less than 3 bytes.
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* The number of address bytes should be equal to or less than 4 bytes.
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*/
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if (op->addr.nbytes > 3)
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if (op->addr.nbytes > 4)
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return false;
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return true;
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}
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@ -526,6 +525,7 @@ static int zynq_qspi_exec_mem_op(struct spi_mem *mem,
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const struct spi_mem_op *op)
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{
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struct zynq_qspi *xqspi = spi_controller_get_devdata(mem->spi->controller);
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u8 opaddr[4] __aligned(4);
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int err = 0, i;
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u8 *tmpbuf;
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@ -547,12 +547,13 @@ static int zynq_qspi_exec_mem_op(struct spi_mem *mem,
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}
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if (op->addr.nbytes) {
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for (i = 0; i < op->addr.nbytes; i++) {
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xqspi->txbuf[i] = op->addr.val >>
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for (i = 0; i < op->addr.nbytes; i++)
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opaddr[i] = op->addr.val >>
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(8 * (op->addr.nbytes - i - 1));
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}
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reinit_completion(&xqspi->data_completion);
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xqspi->txbuf = opaddr;
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xqspi->rxbuf = NULL;
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xqspi->tx_bytes = op->addr.nbytes;
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xqspi->rx_bytes = op->addr.nbytes;
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