From db55777feca876dd2a548a232abeb3ddd8986a09 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Hannotier?= Date: Sat, 4 Jul 2026 14:55:15 +0200 Subject: [PATCH] Documentation/arch/x86/amd-memory-encryption.rst: Fix typo MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The MSR address has one 0 too many: 0xc00100010 → 0xc0010010. Signed-off-by: Cédric Hannotier Signed-off-by: Borislav Petkov (AMD) Link: https://patch.msgid.link/20260704125516.49944-1-hannotiercedric@gmail.com --- Documentation/arch/x86/amd-memory-encryption.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/arch/x86/amd-memory-encryption.rst b/Documentation/arch/x86/amd-memory-encryption.rst index bd840df708ea..92edb26a50d2 100644 --- a/Documentation/arch/x86/amd-memory-encryption.rst +++ b/Documentation/arch/x86/amd-memory-encryption.rst @@ -53,7 +53,7 @@ CPUID function 0x8000001f reports information related to SME:: system physical addresses, not guest physical addresses) -If support for SME is present, MSR 0xc00100010 (MSR_AMD64_SYSCFG) can be used to +If support for SME is present, MSR 0xc0010010 (MSR_AMD64_SYSCFG) can be used to determine if SME is enabled and/or to enable memory encryption:: 0xc0010010: