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arm64: dts: renesas: r9a08g046: Add rsci{0..3} device nodes

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Add rsci{0..3} device nodes to the RZ/G3L ("R9A08G046") SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260519100022.116318-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2026-05-19 11:00:17 +01:00 committed by Geert Uytterhoeven
parent 1b6a230750
commit daae3ecaeb
1 changed files with 84 additions and 0 deletions
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84
arch/arm64/boot/dts/renesas/r9a08g046.dtsi
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@ -358,6 +358,90 @@ i2c3: i2c@10090c00 {
status = "disabled";
};
rsci0: serial@100b8000 {
compatible = "renesas,r9a08g046-rsci";
reg = <0 0x100b8000 0 0x1000>;
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 417 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 418 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 420 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "tei",
"aed", "bfd";
clocks = <&cpg CPG_MOD R9A08G046_RSCI0_TCLK>,
<&cpg CPG_MOD R9A08G046_RSCI0_PCLK>;
clock-names = "operation", "bus";
power-domains = <&cpg>;
resets = <&cpg R9A08G046_RSCI0_PRESETN>,
<&cpg R9A08G046_RSCI0_TRESETN>;
reset-names = "presetn", "tresetn";
status = "disabled";
};
rsci1: serial@100f1000 {
compatible = "renesas,r9a08g046-rsci";
reg = <0 0x100f1000 0 0x1000>;
interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 423 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 424 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 426 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "tei",
"aed", "bfd";
clocks = <&cpg CPG_MOD R9A08G046_RSCI1_TCLK>,
<&cpg CPG_MOD R9A08G046_RSCI1_PCLK>;
clock-names = "operation", "bus";
power-domains = <&cpg>;
resets = <&cpg R9A08G046_RSCI1_PRESETN>,
<&cpg R9A08G046_RSCI1_TRESETN>;
reset-names = "presetn", "tresetn";
status = "disabled";
};
rsci2: serial@100f2000 {
compatible = "renesas,r9a08g046-rsci";
reg = <0 0x100f2000 0 0x1000>;
interrupts = <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 429 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 430 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "tei",
"aed", "bfd";
clocks = <&cpg CPG_MOD R9A08G046_RSCI2_TCLK>,
<&cpg CPG_MOD R9A08G046_RSCI2_PCLK>;
clock-names = "operation", "bus";
power-domains = <&cpg>;
resets = <&cpg R9A08G046_RSCI2_PRESETN>,
<&cpg R9A08G046_RSCI2_TRESETN>;
reset-names = "presetn", "tresetn";
status = "disabled";
};
rsci3: serial@100f3000 {
compatible = "renesas,r9a08g046-rsci";
reg = <0 0x100f3000 0 0x1000>;
interrupts = <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 437 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi", "tei",
"aed", "bfd";
clocks = <&cpg CPG_MOD R9A08G046_RSCI3_TCLK>,
<&cpg CPG_MOD R9A08G046_RSCI3_PCLK>;
clock-names = "operation", "bus";
power-domains = <&cpg>;
resets = <&cpg R9A08G046_RSCI3_PRESETN>,
<&cpg R9A08G046_RSCI3_TRESETN>;
reset-names = "presetn", "tresetn";
status = "disabled";
};
canfd: can@100c0000 {
reg = <0 0x100c0000 0 0x20000>;
/* placeholder */