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Renesas RZ/G3E USB2 PHY Core Clock DT Binding Definitions
USB2 PHY core clock DT binding definitions for the Renesas RZ/G3E (R9A09G047) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaO4NOQAKCRCKwlD9ZEnx cAzhAP97M9ermliN6TJMwwgYQHrhgprrjaIXJ8asgf689iHqfgEAs1cH9Dcbv5ZJ e/ojmtyc98FWYZWr6N/tnEhWlc9O5g8= =O8jN -----END PGP SIGNATURE----- Merge tag 'renesas-r9a09g047-dt-binding-defs-tag5' into renesas-clk-for-v6.19 Renesas RZ/G3E USB2 PHY Core Clock DT Binding Definitions USB2 PHY core clock DT binding definitions for the Renesas RZ/G3E (R9A09G047) SoC, shared by driver and DT source files.
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#define R9A09G047_GBETH_1_CLK_PTP_REF_I 11
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#define R9A09G047_USB3_0_REF_ALT_CLK_P 12
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#define R9A09G047_USB3_0_CLKCORE 13
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#define R9A09G047_USB2_0_CLK_CORE0 14
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#define R9A09G047_USB2_0_CLK_CORE1 15
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#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G047_CPG_H__ */
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