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drm/amd/pm: Add default feature number definition

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The number of default features could be different from the actual width
of the bitmap. Use a different definition for it. Also increase the max
width of bitmap to 128.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar 2026-01-19 18:32:19 +05:30 committed by Alex Deucher
parent 7b88453a47
commit da8c276035
7 changed files with 11 additions and 8 deletions
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2
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
View File

@ -1355,7 +1355,7 @@ static int smu_sw_init(struct amdgpu_ip_block *ip_block)
int i, ret;
smu->pool_size = adev->pm.smu_prv_buffer_size;
smu_feature_init(smu, SMU_FEATURE_MAX);
smu_feature_init(smu, SMU_FEATURE_NUM_DEFAULT);
INIT_WORK(&smu->throttling_logging_work, smu_throttling_logging_work_fn);
INIT_WORK(&smu->interrupt_work, smu_interrupt_work_fn);

3
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
View File

@ -471,7 +471,8 @@ struct smu_power_context {
struct smu_power_gate power_gate;
};
#define SMU_FEATURE_MAX (64)
#define SMU_FEATURE_NUM_DEFAULT (64)
#define SMU_FEATURE_MAX (128)
struct smu_feature_bits {
DECLARE_BITMAP(bits, SMU_FEATURE_MAX);

2
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
View File

@ -751,7 +751,7 @@ int smu_v11_0_set_allowed_mask(struct smu_context *smu)
uint32_t feature_mask[2];
if (smu_feature_list_is_empty(smu, SMU_FEATURE_LIST_ALLOWED) ||
feature->feature_num < 64) {
feature->feature_num < SMU_FEATURE_NUM_DEFAULT) {
ret = -EINVAL;
goto failed;
}

2
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
View File

@ -762,7 +762,7 @@ int smu_v13_0_set_allowed_mask(struct smu_context *smu)
uint32_t feature_mask[2];
if (smu_feature_list_is_empty(smu, SMU_FEATURE_LIST_ALLOWED) ||
feature->feature_num < 64)
feature->feature_num < SMU_FEATURE_NUM_DEFAULT)
return -EINVAL;
smu_feature_list_to_arr32(smu, SMU_FEATURE_LIST_ALLOWED, feature_mask);

2
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
View File

@ -747,7 +747,7 @@ int smu_v14_0_set_allowed_mask(struct smu_context *smu)
uint32_t feature_mask[2];
if (smu_feature_list_is_empty(smu, SMU_FEATURE_LIST_ALLOWED) ||
feature->feature_num < 64)
feature->feature_num < SMU_FEATURE_NUM_DEFAULT)
return -EINVAL;
smu_feature_list_to_arr32(smu, SMU_FEATURE_LIST_ALLOWED, feature_mask);

2
drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
View File

@ -716,7 +716,7 @@ int smu_v15_0_set_allowed_mask(struct smu_context *smu)
uint32_t feature_mask[2];
if (smu_feature_list_is_empty(smu, SMU_FEATURE_LIST_ALLOWED) ||
feature->feature_num < 64)
feature->feature_num < SMU_FEATURE_NUM_DEFAULT)
return -EINVAL;
smu_feature_list_to_arr32(smu, SMU_FEATURE_LIST_ALLOWED, feature_mask);

6
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
View File

@ -794,7 +794,8 @@ int smu_cmn_get_enabled_mask(struct smu_context *smu,
}
if (!ret)
smu_feature_bits_from_arr32(feature_mask, features, 64);
smu_feature_bits_from_arr32(feature_mask, features,
SMU_FEATURE_NUM_DEFAULT);
return ret;
}
@ -909,7 +910,8 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
size += sysfs_emit_at(buf, size, "%-2s. %-20s %-3s : %-s\n",
"No", "Feature", "Bit", "State");
for (feature_index = 0; feature_index < SMU_FEATURE_MAX; feature_index++) {
for (feature_index = 0; feature_index < smu->smu_feature.feature_num;
feature_index++) {
if (sort_feature[feature_index] < 0)
continue;