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arm64: dts: qcom: sdm845-mtp: enable PCIe support

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Enable two PCIe hosts support on Qualcomm SDM845 MTP board.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230826221915.846937-6-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2023-08-27 01:19:15 +03:00 committed by Bjorn Andersson
parent be30dc3182
commit da3620d7c7
1 changed files with 78 additions and 0 deletions
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78
arch/arm64/boot/dts/qcom/sdm845-mtp.dts
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@ -533,6 +533,38 @@ &mss_pil {
firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
};
&pcie0 {
perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_default_state>;
pinctrl-names = "default";
status = "okay";
};
&pcie0_phy {
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l26a_1p2>;
status = "okay";
};
&pcie1 {
perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pcie1_default_state>;
status = "okay";
};
&pcie1_phy {
status = "okay";
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l26a_1p2>;
};
&pm8998_adc {
channel@4c {
reg = <ADC5_XO_THERM_100K_PU>;
@ -630,6 +662,52 @@ &sdhc_2 {
cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
};
&tlmm {
pcie0_default_state: pcie0-default-state {
clkreq-pins {
pins = "gpio36";
function = "pci_e0";
bias-pull-up;
};
perst-n-pins {
pins = "gpio35";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
wake-n-pins {
pins = "gpio37";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
pcie1_default_state: pcie1-default-state {
clkreq-pins {
pins = "gpio103";
function = "pci_e1";
bias-pull-up;
};
perst-n-pins {
pins = "gpio102";
function = "gpio";
drive-strength = <16>;
bias-pull-down;
};
wake-n-pins {
pins = "gpio104";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
};
&uart9 {
status = "okay";
};