dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5

The stmmac hardware on Agilex5 supports 8 TX/RX queue pairs and is
dma-coherent. Update the schema to handle the hardware differences
between SoC variants.

Also make 'interrupts' and 'interrupt-names' as required properties.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: Set the top level interrupts to include the widest contraints(1-17)
    Just have 1 list of all interrupt-names
    Update commit message to include 'interrupts' and 'interrupt-names'
    as required properties
    Change minItems 1 to maxItems 1 for non agilex5 variants
    Add same constraint for interrupt-names
This commit is contained in:
Dinh Nguyen 2026-06-25 17:17:47 -05:00
parent 5eb1916efe
commit da07acfd60

View File

@ -63,11 +63,29 @@ properties:
- const: ptp_ref
interrupts:
maxItems: 1
minItems: 1
maxItems: 17
interrupt-names:
minItems: 1
items:
- const: macirq
- const: tx-queue-0
- const: tx-queue-1
- const: tx-queue-2
- const: tx-queue-3
- const: tx-queue-4
- const: tx-queue-5
- const: tx-queue-6
- const: tx-queue-7
- const: rx-queue-0
- const: rx-queue-1
- const: rx-queue-2
- const: rx-queue-3
- const: rx-queue-4
- const: rx-queue-5
- const: rx-queue-6
- const: rx-queue-7
iommus:
minItems: 1
@ -149,10 +167,36 @@ required:
- clocks
- clock-names
- altr,sysmgr-syscon
- interrupts
- interrupt-names
allOf:
- $ref: snps,dwmac.yaml#
- if:
properties:
compatible:
contains:
const: altr,socfpga-stmmac-agilex5
then:
properties:
interrupts:
minItems: 17
interrupt-names:
minItems: 17
dma-coherent: true
else:
properties:
interrupts:
maxItems: 1
interrupt-names:
maxItems: 1
dma-coherent: false
unevaluatedProperties: false
examples: