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Merge branch 'enetc-v4-hardware-integration-fixes'

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Claudiu Manoil says:

====================
ENETC v4 hardware integration fixes

ENETC v4 targeted fixes addressing SoC level integration issues
regarding AXI settings and register access width.
====================

Link: https://patch.msgid.link/20260130141035.272471-1-claudiu.manoil@nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2026-02-02 18:11:53 -08:00
commit d9f5824d5d
4 changed files with 24 additions and 14 deletions
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11
drivers/net/ethernet/freescale/enetc/enetc.c
View File

@ -2512,10 +2512,13 @@ int enetc_configure_si(struct enetc_ndev_priv *priv)
struct enetc_hw *hw = &si->hw;
int err;
/* set SI cache attributes */
enetc_wr(hw, ENETC_SICAR0,
ENETC_SICAR_RD_COHERENT | ENETC_SICAR_WR_COHERENT);
enetc_wr(hw, ENETC_SICAR1, ENETC_SICAR_MSI);
if (is_enetc_rev1(si)) {
/* set SI cache attributes */
enetc_wr(hw, ENETC_SICAR0,
ENETC_SICAR_RD_COHERENT | ENETC_SICAR_WR_COHERENT);
enetc_wr(hw, ENETC_SICAR1, ENETC_SICAR_MSI);
}
/* enable SI */
enetc_wr(hw, ENETC_SIMR, ENETC_SIMR_EN);

6
drivers/net/ethernet/freescale/enetc/enetc4_pf.c
View File

@ -59,10 +59,10 @@ static void enetc4_pf_set_si_primary_mac(struct enetc_hw *hw, int si,
if (si != 0) {
__raw_writel(upper, hw->port + ENETC4_PSIPMAR0(si));
__raw_writew(lower, hw->port + ENETC4_PSIPMAR1(si));
__raw_writel(lower, hw->port + ENETC4_PSIPMAR1(si));
} else {
__raw_writel(upper, hw->port + ENETC4_PMAR0);
__raw_writew(lower, hw->port + ENETC4_PMAR1);
__raw_writel(lower, hw->port + ENETC4_PMAR1);
}
}
@ -73,7 +73,7 @@ static void enetc4_pf_get_si_primary_mac(struct enetc_hw *hw, int si,
u16 lower;
upper = __raw_readl(hw->port + ENETC4_PSIPMAR0(si));
lower = __raw_readw(hw->port + ENETC4_PSIPMAR1(si));
lower = __raw_readl(hw->port + ENETC4_PSIPMAR1(si));
put_unaligned_le32(upper, addr);
put_unaligned_le16(lower, addr + 4);

4
drivers/net/ethernet/freescale/enetc/enetc_cbdr.c
View File

@ -74,10 +74,6 @@ int enetc4_setup_cbdr(struct enetc_si *si)
if (!user->ring)
return -ENOMEM;
/* set CBDR cache attributes */
enetc_wr(hw, ENETC_SICAR2,
ENETC_SICAR_RD_COHERENT | ENETC_SICAR_WR_COHERENT);
regs.pir = hw->reg + ENETC_SICBDRPIR;
regs.cir = hw->reg + ENETC_SICBDRCIR;
regs.mr = hw->reg + ENETC_SICBDRMR;

17
drivers/net/ethernet/freescale/enetc/enetc_hw.h
View File

@ -708,13 +708,24 @@ struct enetc_cmd_rfse {
#define ENETC_RFSE_EN BIT(15)
#define ENETC_RFSE_MODE_BD 2
static inline void enetc_get_primary_mac_addr(struct enetc_hw *hw, u8 *addr)
{
u32 upper;
u16 lower;
upper = __raw_readl(hw->reg + ENETC_SIPMAR0);
lower = __raw_readl(hw->reg + ENETC_SIPMAR1);
put_unaligned_le32(upper, addr);
put_unaligned_le16(lower, addr + 4);
}
static inline void enetc_load_primary_mac_addr(struct enetc_hw *hw,
struct net_device *ndev)
{
u8 addr[ETH_ALEN] __aligned(4);
u8 addr[ETH_ALEN];
*(u32 *)addr = __raw_readl(hw->reg + ENETC_SIPMAR0);
*(u16 *)(addr + 4) = __raw_readw(hw->reg + ENETC_SIPMAR1);
enetc_get_primary_mac_addr(hw, addr);
eth_hw_addr_set(ndev, addr);
}