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iio: imu: adis16550: Simplify device abstraction
The driver supports a single chip variant only. Simplify the driver by hard-coding the device properties instead of using the id_table's abstraction for a single chip type and a lookup in a table with only one entry. Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Uwe Kleine-König (The Capable Hub)
Jonathan Cameron
parent
fef4337eb2
commit
d9df71de85
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@ -89,25 +89,7 @@ struct adis16550_sync {
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u16 max_rate;
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};
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struct adis16550_chip_info {
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const struct iio_chan_spec *channels;
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const struct adis16550_sync *sync_mode;
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char *name;
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u32 num_channels;
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u32 gyro_max_val;
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u32 gyro_max_scale;
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u32 accel_max_val;
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u32 accel_max_scale;
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u32 temp_scale;
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u32 deltang_max_val;
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u32 deltvel_max_val;
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u32 int_clk;
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u16 max_dec;
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u16 num_sync;
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};
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struct adis16550 {
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const struct adis16550_chip_info *info;
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struct adis adis;
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unsigned long clk_freq_hz;
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u32 sync_mode;
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@ -450,8 +432,8 @@ static int adis16550_set_freq_hz(struct adis16550 *st, u32 freq_hz)
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* The optimal sample rate for the supported IMUs is between
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* int_clk - 1000 and int_clk + 500.
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*/
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u32 max_sample_rate = st->info->int_clk * 1000 + 500000;
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u32 min_sample_rate = st->info->int_clk * 1000 - 1000000;
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u32 max_sample_rate = 4000 * 1000 + 500000;
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u32 min_sample_rate = 4000 * 1000 - 1000000;
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if (!freq_hz)
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return -EINVAL;
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@ -484,7 +466,7 @@ static int adis16550_set_freq_hz(struct adis16550 *st, u32 freq_hz)
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if (dec)
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dec--;
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dec = min(dec, st->info->max_dec);
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dec = min(dec, 4095);
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return __adis_write_reg_16(&st->adis, ADIS16550_REG_DEC_RATE, dec);
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}
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@ -592,30 +574,30 @@ static int adis16550_read_raw(struct iio_dev *indio_dev,
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case IIO_CHAN_INFO_SCALE:
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switch (chan->type) {
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case IIO_ANGL_VEL:
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*val = st->info->gyro_max_val;
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*val2 = st->info->gyro_max_scale;
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*val = 1;
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*val2 = IIO_RAD_TO_DEGREE(80 << 16);
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return IIO_VAL_FRACTIONAL;
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case IIO_ACCEL:
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*val = st->info->accel_max_val;
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*val2 = st->info->accel_max_scale;
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*val = 1;
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*val2 = IIO_M_S_2_TO_G(102400000);
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return IIO_VAL_FRACTIONAL;
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case IIO_TEMP:
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*val = st->info->temp_scale;
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*val = 4;
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return IIO_VAL_INT;
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case IIO_DELTA_ANGL:
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*val = st->info->deltang_max_val;
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*val = IIO_DEGREE_TO_RAD(720);
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*val2 = 31;
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return IIO_VAL_FRACTIONAL_LOG2;
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case IIO_DELTA_VELOCITY:
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*val = st->info->deltvel_max_val;
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*val = 125;
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*val2 = 31;
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return IIO_VAL_FRACTIONAL_LOG2;
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default:
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return -EINVAL;
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}
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case IIO_CHAN_INFO_OFFSET:
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/* temperature centered at 25°C */
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*val = DIV_ROUND_CLOSEST(25000, st->info->temp_scale);
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/* temperature centered at 25°C divided by temp scale */
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*val = 25000 / 4;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_CALIBBIAS:
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ret = adis_read_reg_32(&st->adis,
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@ -793,23 +775,6 @@ static const struct adis16550_sync adis16550_sync_modes[] = {
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{ ADIS16550_SYNC_MODE_SCALED, 1, 128 },
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};
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static const struct adis16550_chip_info adis16550_chip_info = {
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.num_channels = ARRAY_SIZE(adis16550_channels),
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.channels = adis16550_channels,
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.name = "adis16550",
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.gyro_max_val = 1,
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.gyro_max_scale = IIO_RAD_TO_DEGREE(80 << 16),
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.accel_max_val = 1,
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.accel_max_scale = IIO_M_S_2_TO_G(102400000),
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.temp_scale = 4,
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.deltang_max_val = IIO_DEGREE_TO_RAD(720),
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.deltvel_max_val = 125,
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.int_clk = 4000,
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.max_dec = 4095,
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.sync_mode = adis16550_sync_modes,
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.num_sync = ARRAY_SIZE(adis16550_sync_modes),
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};
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static u32 adis16550_validate_crc(__be32 *buffer, const u8 n_elem)
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{
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int i;
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@ -918,21 +883,21 @@ static int adis16550_config_sync(struct adis16550 *st)
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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if (!clk) {
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st->clk_freq_hz = st->info->int_clk * 1000;
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st->clk_freq_hz = 4000000;
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return 0;
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}
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st->clk_freq_hz = clk_get_rate(clk);
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for (i = 0; i < st->info->num_sync; i++) {
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if (st->clk_freq_hz >= st->info->sync_mode[i].min_rate &&
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st->clk_freq_hz <= st->info->sync_mode[i].max_rate) {
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sync_mode_data = &st->info->sync_mode[i];
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for (i = 0; i < ARRAY_SIZE(adis16550_sync_modes); i++) {
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if (st->clk_freq_hz >= adis16550_sync_modes[i].min_rate &&
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st->clk_freq_hz <= adis16550_sync_modes[i].max_rate) {
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sync_mode_data = &adis16550_sync_modes[i];
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break;
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}
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}
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if (i == st->info->num_sync)
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if (i == ARRAY_SIZE(adis16550_sync_modes))
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return dev_err_probe(dev, -EINVAL, "Clk rate: %lu not in a valid range",
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st->clk_freq_hz);
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@ -943,7 +908,7 @@ static int adis16550_config_sync(struct adis16550 *st)
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* of [3000 4500].
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*/
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sync_scale = DIV_ROUND_CLOSEST(st->info->int_clk, st->clk_freq_hz);
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sync_scale = DIV_ROUND_CLOSEST(4000, st->clk_freq_hz);
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if (3000 > sync_scale || 4500 < sync_scale)
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return dev_err_probe(dev, -EINVAL,
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@ -955,7 +920,7 @@ static int adis16550_config_sync(struct adis16550 *st)
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if (ret)
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return ret;
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st->clk_freq_hz = st->info->int_clk;
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st->clk_freq_hz = 4000;
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}
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st->clk_freq_hz *= 1000;
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@ -1064,13 +1029,11 @@ static int adis16550_probe(struct spi_device *spi)
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return -ENOMEM;
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st = iio_priv(indio_dev);
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st->info = spi_get_device_match_data(spi);
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if (!st->info)
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return -EINVAL;
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adis = &st->adis;
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indio_dev->name = st->info->name;
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indio_dev->channels = st->info->channels;
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indio_dev->num_channels = st->info->num_channels;
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indio_dev->name = "adis16550";
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indio_dev->channels = adis16550_channels;
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indio_dev->num_channels = ARRAY_SIZE(adis16550_channels);
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indio_dev->available_scan_masks = adis16550_channel_masks;
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indio_dev->info = &adis16550_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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@ -1117,13 +1080,13 @@ static int adis16550_probe(struct spi_device *spi)
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}
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static const struct spi_device_id adis16550_id[] = {
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{ "adis16550", (kernel_ulong_t)&adis16550_chip_info},
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{ .name = "adis16550" },
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{ }
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};
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MODULE_DEVICE_TABLE(spi, adis16550_id);
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static const struct of_device_id adis16550_of_match[] = {
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{ .compatible = "adi,adis16550", .data = &adis16550_chip_info },
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{ .compatible = "adi,adis16550" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, adis16550_of_match);
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