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Merge branch 'for-6.18/cxl-poison-inject' into cxl-for-next
Add support to allow expert users to inject and clear poison for the CXL subsystem by writing a System Physical Address (SPA) to a debugfs file.
This commit is contained in:
Dave Jiang
commit
d9412f08e2
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@ -19,6 +19,20 @@ Description:
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is returned to the user. The inject_poison attribute is only
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visible for devices supporting the capability.
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TEST-ONLY INTERFACE: This interface is intended for testing
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and validation purposes only. It is not a data repair mechanism
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and should never be used on production systems or live data.
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DATA LOSS RISK: For CXL persistent memory (PMEM) devices,
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poison injection can result in permanent data loss. Injected
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poison may render data permanently inaccessible even after
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clearing, as the clear operation writes zeros and does not
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recover original data.
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SYSTEM STABILITY RISK: For volatile memory, poison injection
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can cause kernel crashes, system instability, or unpredictable
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behavior if the poisoned addresses are accessed by running code
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or critical kernel structures.
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What: /sys/kernel/debug/cxl/memX/clear_poison
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Date: April, 2023
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@ -35,6 +49,79 @@ Description:
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The clear_poison attribute is only visible for devices
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supporting the capability.
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TEST-ONLY INTERFACE: This interface is intended for testing
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and validation purposes only. It is not a data repair mechanism
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and should never be used on production systems or live data.
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CLEAR IS NOT DATA RECOVERY: This operation writes zeros to the
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specified address range and removes the address from the poison
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list. It does NOT recover or restore original data that may have
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been present before poison injection. Any original data at the
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cleared address is permanently lost and replaced with zeros.
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CLEAR IS NOT A REPAIR MECHANISM: This interface is for testing
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purposes only and should not be used as a data repair tool.
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Clearing poison is fundamentally different from data recovery
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or error correction.
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What: /sys/kernel/debug/cxl/regionX/inject_poison
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Date: August, 2025
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Contact: linux-cxl@vger.kernel.org
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Description:
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(WO) When a Host Physical Address (HPA) is written to this
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attribute, the region driver translates it to a Device
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Physical Address (DPA) and identifies the corresponding
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memdev. It then sends an inject poison command to that memdev
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at the translated DPA. Refer to the memdev ABI entry at:
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/sys/kernel/debug/cxl/memX/inject_poison for the detailed
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behavior. This attribute is only visible if all memdevs
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participating in the region support both inject and clear
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poison commands.
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TEST-ONLY INTERFACE: This interface is intended for testing
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and validation purposes only. It is not a data repair mechanism
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and should never be used on production systems or live data.
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DATA LOSS RISK: For CXL persistent memory (PMEM) devices,
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poison injection can result in permanent data loss. Injected
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poison may render data permanently inaccessible even after
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clearing, as the clear operation writes zeros and does not
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recover original data.
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SYSTEM STABILITY RISK: For volatile memory, poison injection
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can cause kernel crashes, system instability, or unpredictable
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behavior if the poisoned addresses are accessed by running code
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or critical kernel structures.
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What: /sys/kernel/debug/cxl/regionX/clear_poison
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Date: August, 2025
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Contact: linux-cxl@vger.kernel.org
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Description:
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(WO) When a Host Physical Address (HPA) is written to this
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attribute, the region driver translates it to a Device
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Physical Address (DPA) and identifies the corresponding
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memdev. It then sends a clear poison command to that memdev
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at the translated DPA. Refer to the memdev ABI entry at:
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/sys/kernel/debug/cxl/memX/clear_poison for the detailed
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behavior. This attribute is only visible if all memdevs
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participating in the region support both inject and clear
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poison commands.
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TEST-ONLY INTERFACE: This interface is intended for testing
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and validation purposes only. It is not a data repair mechanism
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and should never be used on production systems or live data.
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CLEAR IS NOT DATA RECOVERY: This operation writes zeros to the
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specified address range and removes the address from the poison
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list. It does NOT recover or restore original data that may have
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been present before poison injection. Any original data at the
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cleared address is permanently lost and replaced with zeros.
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CLEAR IS NOT A REPAIR MECHANISM: This interface is for testing
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purposes only and should not be used as a data repair tool.
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Clearing poison is fundamentally different from data recovery
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or error correction.
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What: /sys/kernel/debug/cxl/einj_types
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Date: January, 2024
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KernelVersion: v6.9
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@ -173,7 +173,7 @@ Accelerator
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User Flow Support
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-----------------
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* [0] Inject & clear poison by HPA
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* [2] Inject & clear poison by region offset
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Details
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=======
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@ -20,8 +20,7 @@ static const guid_t acpi_cxl_qtg_id_guid =
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GUID_INIT(0xF365F9A6, 0xA7DE, 0x4071,
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0xA6, 0x6A, 0xB4, 0x0C, 0x0B, 0x4F, 0x8E, 0x52);
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static u64 cxl_xor_hpa_to_spa(struct cxl_root_decoder *cxlrd, u64 hpa)
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static u64 cxl_apply_xor_maps(struct cxl_root_decoder *cxlrd, u64 addr)
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{
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struct cxl_cxims_data *cximsd = cxlrd->platform_data;
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int hbiw = cxlrd->cxlsd.nr_targets;
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@ -30,19 +29,23 @@ static u64 cxl_xor_hpa_to_spa(struct cxl_root_decoder *cxlrd, u64 hpa)
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/* No xormaps for host bridge interleave ways of 1 or 3 */
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if (hbiw == 1 || hbiw == 3)
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return hpa;
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return addr;
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/*
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* For root decoders using xormaps (hbiw: 2,4,6,8,12,16) restore
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* the position bit to its value before the xormap was applied at
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* HPA->DPA translation.
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* In regions using XOR interleave arithmetic the CXL HPA may not
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* be the same as the SPA. This helper performs the SPA->CXL HPA
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* or the CXL HPA->SPA translation. Since XOR is self-inverting,
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* so is this function.
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*
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* For root decoders using xormaps (hbiw: 2,4,6,8,12,16) applying the
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* xormaps will toggle a position bit.
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*
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* pos is the lowest set bit in an XORMAP
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* val is the XORALLBITS(HPA & XORMAP)
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* val is the XORALLBITS(addr & XORMAP)
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*
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* XORALLBITS: The CXL spec (3.1 Table 9-22) defines XORALLBITS
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* as an operation that outputs a single bit by XORing all the
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* bits in the input (hpa & xormap). Implement XORALLBITS using
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* bits in the input (addr & xormap). Implement XORALLBITS using
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* hweight64(). If the hamming weight is even the XOR of those
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* bits results in val==0, if odd the XOR result is val==1.
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*/
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@ -51,11 +54,11 @@ static u64 cxl_xor_hpa_to_spa(struct cxl_root_decoder *cxlrd, u64 hpa)
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if (!cximsd->xormaps[i])
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continue;
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pos = __ffs(cximsd->xormaps[i]);
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val = (hweight64(hpa & cximsd->xormaps[i]) & 1);
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hpa = (hpa & ~(1ULL << pos)) | (val << pos);
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val = (hweight64(addr & cximsd->xormaps[i]) & 1);
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addr = (addr & ~(1ULL << pos)) | (val << pos);
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}
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return hpa;
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return addr;
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}
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struct cxl_cxims_context {
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@ -472,8 +475,14 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
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cxlrd->qos_class = cfmws->qtg_id;
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if (cfmws->interleave_arithmetic == ACPI_CEDT_CFMWS_ARITHMETIC_XOR)
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cxlrd->hpa_to_spa = cxl_xor_hpa_to_spa;
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if (cfmws->interleave_arithmetic == ACPI_CEDT_CFMWS_ARITHMETIC_XOR) {
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cxlrd->ops = kzalloc(sizeof(*cxlrd->ops), GFP_KERNEL);
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if (!cxlrd->ops)
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return -ENOMEM;
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cxlrd->ops->hpa_to_spa = cxl_apply_xor_maps;
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cxlrd->ops->spa_to_hpa = cxl_apply_xor_maps;
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}
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rc = cxl_decoder_add(cxld, target_map);
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if (rc)
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@ -135,6 +135,10 @@ enum cxl_poison_trace_type {
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CXL_POISON_TRACE_CLEAR,
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};
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enum poison_cmd_enabled_bits;
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bool cxl_memdev_has_poison_cmd(struct cxl_memdev *cxlmd,
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enum poison_cmd_enabled_bits cmd);
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long cxl_pci_get_latency(struct pci_dev *pdev);
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int cxl_pci_get_bandwidth(struct pci_dev *pdev, struct access_coordinate *c);
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int cxl_update_hmat_access_coordinates(int nid, struct cxl_region *cxlr,
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@ -200,6 +200,14 @@ static ssize_t security_erase_store(struct device *dev,
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static struct device_attribute dev_attr_security_erase =
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__ATTR(erase, 0200, NULL, security_erase_store);
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bool cxl_memdev_has_poison_cmd(struct cxl_memdev *cxlmd,
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enum poison_cmd_enabled_bits cmd)
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{
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struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds);
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return test_bit(cmd, mds->poison.enabled_cmds);
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}
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static int cxl_get_poison_by_memdev(struct cxl_memdev *cxlmd)
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{
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struct cxl_dev_state *cxlds = cxlmd->cxlds;
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@ -276,7 +284,7 @@ static int cxl_validate_poison_dpa(struct cxl_memdev *cxlmd, u64 dpa)
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return 0;
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}
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int cxl_inject_poison(struct cxl_memdev *cxlmd, u64 dpa)
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int cxl_inject_poison_locked(struct cxl_memdev *cxlmd, u64 dpa)
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{
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struct cxl_mailbox *cxl_mbox = &cxlmd->cxlds->cxl_mbox;
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struct cxl_mbox_inject_poison inject;
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@ -288,13 +296,8 @@ int cxl_inject_poison(struct cxl_memdev *cxlmd, u64 dpa)
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if (!IS_ENABLED(CONFIG_DEBUG_FS))
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return 0;
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ACQUIRE(rwsem_read_intr, region_rwsem)(&cxl_rwsem.region);
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if ((rc = ACQUIRE_ERR(rwsem_read_intr, ®ion_rwsem)))
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return rc;
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ACQUIRE(rwsem_read_intr, dpa_rwsem)(&cxl_rwsem.dpa);
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if ((rc = ACQUIRE_ERR(rwsem_read_intr, &dpa_rwsem)))
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return rc;
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lockdep_assert_held(&cxl_rwsem.dpa);
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lockdep_assert_held(&cxl_rwsem.region);
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rc = cxl_validate_poison_dpa(cxlmd, dpa);
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if (rc)
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@ -324,9 +327,24 @@ int cxl_inject_poison(struct cxl_memdev *cxlmd, u64 dpa)
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return 0;
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}
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int cxl_inject_poison(struct cxl_memdev *cxlmd, u64 dpa)
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{
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int rc;
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ACQUIRE(rwsem_read_intr, region_rwsem)(&cxl_rwsem.region);
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if ((rc = ACQUIRE_ERR(rwsem_read_intr, ®ion_rwsem)))
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return rc;
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ACQUIRE(rwsem_read_intr, dpa_rwsem)(&cxl_rwsem.dpa);
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if ((rc = ACQUIRE_ERR(rwsem_read_intr, &dpa_rwsem)))
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return rc;
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return cxl_inject_poison_locked(cxlmd, dpa);
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}
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EXPORT_SYMBOL_NS_GPL(cxl_inject_poison, "CXL");
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int cxl_clear_poison(struct cxl_memdev *cxlmd, u64 dpa)
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int cxl_clear_poison_locked(struct cxl_memdev *cxlmd, u64 dpa)
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{
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struct cxl_mailbox *cxl_mbox = &cxlmd->cxlds->cxl_mbox;
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struct cxl_mbox_clear_poison clear;
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@ -338,13 +356,8 @@ int cxl_clear_poison(struct cxl_memdev *cxlmd, u64 dpa)
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if (!IS_ENABLED(CONFIG_DEBUG_FS))
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return 0;
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ACQUIRE(rwsem_read_intr, region_rwsem)(&cxl_rwsem.region);
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if ((rc = ACQUIRE_ERR(rwsem_read_intr, ®ion_rwsem)))
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return rc;
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ACQUIRE(rwsem_read_intr, dpa_rwsem)(&cxl_rwsem.dpa);
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if ((rc = ACQUIRE_ERR(rwsem_read_intr, &dpa_rwsem)))
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return rc;
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lockdep_assert_held(&cxl_rwsem.dpa);
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lockdep_assert_held(&cxl_rwsem.region);
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rc = cxl_validate_poison_dpa(cxlmd, dpa);
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if (rc)
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@ -383,6 +396,21 @@ int cxl_clear_poison(struct cxl_memdev *cxlmd, u64 dpa)
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return 0;
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}
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int cxl_clear_poison(struct cxl_memdev *cxlmd, u64 dpa)
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{
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int rc;
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ACQUIRE(rwsem_read_intr, region_rwsem)(&cxl_rwsem.region);
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if ((rc = ACQUIRE_ERR(rwsem_read_intr, ®ion_rwsem)))
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return rc;
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ACQUIRE(rwsem_read_intr, dpa_rwsem)(&cxl_rwsem.dpa);
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if ((rc = ACQUIRE_ERR(rwsem_read_intr, &dpa_rwsem)))
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return rc;
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return cxl_clear_poison_locked(cxlmd, dpa);
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}
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EXPORT_SYMBOL_NS_GPL(cxl_clear_poison, "CXL");
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static struct attribute *cxl_memdev_attributes[] = {
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|
|
|
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|
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@ -450,6 +450,7 @@ static void cxl_root_decoder_release(struct device *dev)
|
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if (atomic_read(&cxlrd->region_id) >= 0)
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memregion_free(atomic_read(&cxlrd->region_id));
|
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__cxl_decoder_release(&cxlrd->cxlsd.cxld);
|
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kfree(cxlrd->ops);
|
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kfree(cxlrd);
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}
|
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|
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|
|
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|
|
@ -2,6 +2,7 @@
|
|||
/* Copyright(c) 2022 Intel Corporation. All rights reserved. */
|
||||
#include <linux/memregion.h>
|
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#include <linux/genalloc.h>
|
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#include <linux/debugfs.h>
|
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#include <linux/device.h>
|
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#include <linux/module.h>
|
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#include <linux/memory.h>
|
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|
|
@ -2917,6 +2918,16 @@ static bool cxl_is_hpa_in_chunk(u64 hpa, struct cxl_region *cxlr, int pos)
|
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return false;
|
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}
|
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|
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static bool has_hpa_to_spa(struct cxl_root_decoder *cxlrd)
|
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{
|
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return cxlrd->ops && cxlrd->ops->hpa_to_spa;
|
||||
}
|
||||
|
||||
static bool has_spa_to_hpa(struct cxl_root_decoder *cxlrd)
|
||||
{
|
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return cxlrd->ops && cxlrd->ops->spa_to_hpa;
|
||||
}
|
||||
|
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u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd,
|
||||
u64 dpa)
|
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{
|
||||
|
|
@ -2971,8 +2982,8 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd,
|
|||
hpa = hpa_offset + p->res->start + p->cache_size;
|
||||
|
||||
/* Root decoder translation overrides typical modulo decode */
|
||||
if (cxlrd->hpa_to_spa)
|
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hpa = cxlrd->hpa_to_spa(cxlrd, hpa);
|
||||
if (has_hpa_to_spa(cxlrd))
|
||||
hpa = cxlrd->ops->hpa_to_spa(cxlrd, hpa);
|
||||
|
||||
if (!cxl_resource_contains_addr(p->res, hpa)) {
|
||||
dev_dbg(&cxlr->dev,
|
||||
|
|
@ -2981,12 +2992,107 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd,
|
|||
}
|
||||
|
||||
/* Simple chunk check, by pos & gran, only applies to modulo decodes */
|
||||
if (!cxlrd->hpa_to_spa && (!cxl_is_hpa_in_chunk(hpa, cxlr, pos)))
|
||||
if (!has_hpa_to_spa(cxlrd) && (!cxl_is_hpa_in_chunk(hpa, cxlr, pos)))
|
||||
return ULLONG_MAX;
|
||||
|
||||
return hpa;
|
||||
}
|
||||
|
||||
struct dpa_result {
|
||||
struct cxl_memdev *cxlmd;
|
||||
u64 dpa;
|
||||
};
|
||||
|
||||
static int region_offset_to_dpa_result(struct cxl_region *cxlr, u64 offset,
|
||||
struct dpa_result *result)
|
||||
{
|
||||
struct cxl_region_params *p = &cxlr->params;
|
||||
struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(cxlr->dev.parent);
|
||||
struct cxl_endpoint_decoder *cxled;
|
||||
u64 hpa, hpa_offset, dpa_offset;
|
||||
u64 bits_upper, bits_lower;
|
||||
u64 shifted, rem, temp;
|
||||
u16 eig = 0;
|
||||
u8 eiw = 0;
|
||||
int pos;
|
||||
|
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lockdep_assert_held(&cxl_rwsem.region);
|
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lockdep_assert_held(&cxl_rwsem.dpa);
|
||||
|
||||
/* Input validation ensures valid ways and gran */
|
||||
granularity_to_eig(p->interleave_granularity, &eig);
|
||||
ways_to_eiw(p->interleave_ways, &eiw);
|
||||
|
||||
/*
|
||||
* If the root decoder has SPA to CXL HPA callback, use it. Otherwise
|
||||
* CXL HPA is assumed to equal SPA.
|
||||
*/
|
||||
if (has_spa_to_hpa(cxlrd)) {
|
||||
hpa = cxlrd->ops->spa_to_hpa(cxlrd, p->res->start + offset);
|
||||
hpa_offset = hpa - p->res->start;
|
||||
} else {
|
||||
hpa_offset = offset;
|
||||
}
|
||||
/*
|
||||
* Interleave position: CXL Spec 3.2 Section 8.2.4.20.13
|
||||
* eiw < 8
|
||||
* Position is in the IW bits at HPA_OFFSET[IG+8+IW-1:IG+8].
|
||||
* Per spec "remove IW bits starting with bit position IG+8"
|
||||
* eiw >= 8
|
||||
* Position is not explicitly stored in HPA_OFFSET bits. It is
|
||||
* derived from the modulo operation of the upper bits using
|
||||
* the total number of interleave ways.
|
||||
*/
|
||||
if (eiw < 8) {
|
||||
pos = (hpa_offset >> (eig + 8)) & GENMASK(eiw - 1, 0);
|
||||
} else {
|
||||
shifted = hpa_offset >> (eig + 8);
|
||||
div64_u64_rem(shifted, p->interleave_ways, &rem);
|
||||
pos = rem;
|
||||
}
|
||||
if (pos < 0 || pos >= p->nr_targets) {
|
||||
dev_dbg(&cxlr->dev, "Invalid position %d for %d targets\n",
|
||||
pos, p->nr_targets);
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
/*
|
||||
* DPA offset: CXL Spec 3.2 Section 8.2.4.20.13
|
||||
* Lower bits [IG+7:0] pass through unchanged
|
||||
* (eiw < 8)
|
||||
* Per spec: DPAOffset[51:IG+8] = (HPAOffset[51:IG+IW+8] >> IW)
|
||||
* Clear the position bits to isolate upper section, then
|
||||
* reverse the left shift by eiw that occurred during DPA->HPA
|
||||
* (eiw >= 8)
|
||||
* Per spec: DPAOffset[51:IG+8] = HPAOffset[51:IG+IW] / 3
|
||||
* Extract upper bits from the correct bit range and divide by 3
|
||||
* to recover the original DPA upper bits
|
||||
*/
|
||||
bits_lower = hpa_offset & GENMASK_ULL(eig + 7, 0);
|
||||
if (eiw < 8) {
|
||||
temp = hpa_offset &= ~((u64)GENMASK(eig + eiw + 8 - 1, 0));
|
||||
dpa_offset = temp >> eiw;
|
||||
} else {
|
||||
bits_upper = div64_u64(hpa_offset >> (eig + eiw), 3);
|
||||
dpa_offset = bits_upper << (eig + 8);
|
||||
}
|
||||
dpa_offset |= bits_lower;
|
||||
|
||||
/* Look-up and return the result: a memdev and a DPA */
|
||||
for (int i = 0; i < p->nr_targets; i++) {
|
||||
cxled = p->targets[i];
|
||||
if (cxled->pos != pos)
|
||||
continue;
|
||||
result->cxlmd = cxled_to_memdev(cxled);
|
||||
result->dpa = cxl_dpa_resource_start(cxled) + dpa_offset;
|
||||
|
||||
return 0;
|
||||
}
|
||||
dev_err(&cxlr->dev, "No device found for position %d\n", pos);
|
||||
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
static struct lock_class_key cxl_pmem_region_key;
|
||||
|
||||
static int cxl_pmem_region_alloc(struct cxl_region *cxlr)
|
||||
|
|
@ -3541,6 +3647,105 @@ static void shutdown_notifiers(void *_cxlr)
|
|||
unregister_mt_adistance_algorithm(&cxlr->adist_notifier);
|
||||
}
|
||||
|
||||
static void remove_debugfs(void *dentry)
|
||||
{
|
||||
debugfs_remove_recursive(dentry);
|
||||
}
|
||||
|
||||
static int validate_region_offset(struct cxl_region *cxlr, u64 offset)
|
||||
{
|
||||
struct cxl_region_params *p = &cxlr->params;
|
||||
resource_size_t region_size;
|
||||
u64 hpa;
|
||||
|
||||
if (offset < p->cache_size) {
|
||||
dev_err(&cxlr->dev,
|
||||
"Offset %#llx is within extended linear cache %#llx\n",
|
||||
offset, p->cache_size);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
region_size = resource_size(p->res);
|
||||
if (offset >= region_size) {
|
||||
dev_err(&cxlr->dev, "Offset %#llx exceeds region size %#llx\n",
|
||||
offset, region_size);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
hpa = p->res->start + offset;
|
||||
if (hpa < p->res->start || hpa > p->res->end) {
|
||||
dev_err(&cxlr->dev, "HPA %#llx not in region %pr\n", hpa,
|
||||
p->res);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cxl_region_debugfs_poison_inject(void *data, u64 offset)
|
||||
{
|
||||
struct dpa_result result = { .dpa = ULLONG_MAX, .cxlmd = NULL };
|
||||
struct cxl_region *cxlr = data;
|
||||
int rc;
|
||||
|
||||
ACQUIRE(rwsem_read_intr, region_rwsem)(&cxl_rwsem.region);
|
||||
if ((rc = ACQUIRE_ERR(rwsem_read_intr, ®ion_rwsem)))
|
||||
return rc;
|
||||
|
||||
ACQUIRE(rwsem_read_intr, dpa_rwsem)(&cxl_rwsem.dpa);
|
||||
if ((rc = ACQUIRE_ERR(rwsem_read_intr, &dpa_rwsem)))
|
||||
return rc;
|
||||
|
||||
if (validate_region_offset(cxlr, offset))
|
||||
return -EINVAL;
|
||||
|
||||
rc = region_offset_to_dpa_result(cxlr, offset, &result);
|
||||
if (rc || !result.cxlmd || result.dpa == ULLONG_MAX) {
|
||||
dev_dbg(&cxlr->dev,
|
||||
"Failed to resolve DPA for region offset %#llx rc %d\n",
|
||||
offset, rc);
|
||||
|
||||
return rc ? rc : -EINVAL;
|
||||
}
|
||||
|
||||
return cxl_inject_poison_locked(result.cxlmd, result.dpa);
|
||||
}
|
||||
|
||||
DEFINE_DEBUGFS_ATTRIBUTE(cxl_poison_inject_fops, NULL,
|
||||
cxl_region_debugfs_poison_inject, "%llx\n");
|
||||
|
||||
static int cxl_region_debugfs_poison_clear(void *data, u64 offset)
|
||||
{
|
||||
struct dpa_result result = { .dpa = ULLONG_MAX, .cxlmd = NULL };
|
||||
struct cxl_region *cxlr = data;
|
||||
int rc;
|
||||
|
||||
ACQUIRE(rwsem_read_intr, region_rwsem)(&cxl_rwsem.region);
|
||||
if ((rc = ACQUIRE_ERR(rwsem_read_intr, ®ion_rwsem)))
|
||||
return rc;
|
||||
|
||||
ACQUIRE(rwsem_read_intr, dpa_rwsem)(&cxl_rwsem.dpa);
|
||||
if ((rc = ACQUIRE_ERR(rwsem_read_intr, &dpa_rwsem)))
|
||||
return rc;
|
||||
|
||||
if (validate_region_offset(cxlr, offset))
|
||||
return -EINVAL;
|
||||
|
||||
rc = region_offset_to_dpa_result(cxlr, offset, &result);
|
||||
if (rc || !result.cxlmd || result.dpa == ULLONG_MAX) {
|
||||
dev_dbg(&cxlr->dev,
|
||||
"Failed to resolve DPA for region offset %#llx rc %d\n",
|
||||
offset, rc);
|
||||
|
||||
return rc ? rc : -EINVAL;
|
||||
}
|
||||
|
||||
return cxl_clear_poison_locked(result.cxlmd, result.dpa);
|
||||
}
|
||||
|
||||
DEFINE_DEBUGFS_ATTRIBUTE(cxl_poison_clear_fops, NULL,
|
||||
cxl_region_debugfs_poison_clear, "%llx\n");
|
||||
|
||||
static int cxl_region_can_probe(struct cxl_region *cxlr)
|
||||
{
|
||||
struct cxl_region_params *p = &cxlr->params;
|
||||
|
|
@ -3570,6 +3775,7 @@ static int cxl_region_probe(struct device *dev)
|
|||
{
|
||||
struct cxl_region *cxlr = to_cxl_region(dev);
|
||||
struct cxl_region_params *p = &cxlr->params;
|
||||
bool poison_supported = true;
|
||||
int rc;
|
||||
|
||||
rc = cxl_region_can_probe(cxlr);
|
||||
|
|
@ -3593,6 +3799,31 @@ static int cxl_region_probe(struct device *dev)
|
|||
if (rc)
|
||||
return rc;
|
||||
|
||||
/* Create poison attributes if all memdevs support the capabilities */
|
||||
for (int i = 0; i < p->nr_targets; i++) {
|
||||
struct cxl_endpoint_decoder *cxled = p->targets[i];
|
||||
struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
|
||||
|
||||
if (!cxl_memdev_has_poison_cmd(cxlmd, CXL_POISON_ENABLED_INJECT) ||
|
||||
!cxl_memdev_has_poison_cmd(cxlmd, CXL_POISON_ENABLED_CLEAR)) {
|
||||
poison_supported = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (poison_supported) {
|
||||
struct dentry *dentry;
|
||||
|
||||
dentry = cxl_debugfs_create_dir(dev_name(dev));
|
||||
debugfs_create_file("inject_poison", 0200, dentry, cxlr,
|
||||
&cxl_poison_inject_fops);
|
||||
debugfs_create_file("clear_poison", 0200, dentry, cxlr,
|
||||
&cxl_poison_clear_fops);
|
||||
rc = devm_add_action_or_reset(dev, remove_debugfs, dentry);
|
||||
if (rc)
|
||||
return rc;
|
||||
}
|
||||
|
||||
switch (cxlr->mode) {
|
||||
case CXL_PARTMODE_PMEM:
|
||||
rc = devm_cxl_region_edac_register(cxlr);
|
||||
|
|
|
|||
|
|
@ -419,27 +419,35 @@ struct cxl_switch_decoder {
|
|||
};
|
||||
|
||||
struct cxl_root_decoder;
|
||||
typedef u64 (*cxl_hpa_to_spa_fn)(struct cxl_root_decoder *cxlrd, u64 hpa);
|
||||
/**
|
||||
* struct cxl_rd_ops - CXL root decoder callback operations
|
||||
* @hpa_to_spa: Convert host physical address to system physical address
|
||||
* @spa_to_hpa: Convert system physical address to host physical address
|
||||
*/
|
||||
struct cxl_rd_ops {
|
||||
u64 (*hpa_to_spa)(struct cxl_root_decoder *cxlrd, u64 hpa);
|
||||
u64 (*spa_to_hpa)(struct cxl_root_decoder *cxlrd, u64 spa);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct cxl_root_decoder - Static platform CXL address decoder
|
||||
* @res: host / parent resource for region allocations
|
||||
* @cache_size: extended linear cache size if exists, otherwise zero.
|
||||
* @region_id: region id for next region provisioning event
|
||||
* @hpa_to_spa: translate CXL host-physical-address to Platform system-physical-address
|
||||
* @platform_data: platform specific configuration data
|
||||
* @range_lock: sync region autodiscovery by address range
|
||||
* @qos_class: QoS performance class cookie
|
||||
* @ops: CXL root decoder operations
|
||||
* @cxlsd: base cxl switch decoder
|
||||
*/
|
||||
struct cxl_root_decoder {
|
||||
struct resource *res;
|
||||
resource_size_t cache_size;
|
||||
atomic_t region_id;
|
||||
cxl_hpa_to_spa_fn hpa_to_spa;
|
||||
void *platform_data;
|
||||
struct mutex range_lock;
|
||||
int qos_class;
|
||||
struct cxl_rd_ops *ops;
|
||||
struct cxl_switch_decoder cxlsd;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -869,6 +869,8 @@ int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len,
|
|||
int cxl_trigger_poison_list(struct cxl_memdev *cxlmd);
|
||||
int cxl_inject_poison(struct cxl_memdev *cxlmd, u64 dpa);
|
||||
int cxl_clear_poison(struct cxl_memdev *cxlmd, u64 dpa);
|
||||
int cxl_inject_poison_locked(struct cxl_memdev *cxlmd, u64 dpa);
|
||||
int cxl_clear_poison_locked(struct cxl_memdev *cxlmd, u64 dpa);
|
||||
|
||||
#ifdef CONFIG_CXL_EDAC_MEM_FEATURES
|
||||
int devm_cxl_memdev_edac_register(struct cxl_memdev *cxlmd);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user