diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c index 097a3e1c67aa..2703207a9efa 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c @@ -1096,11 +1096,16 @@ int ixgbe_aci_set_phy_cfg(struct ixgbe_hw *hw, { struct ixgbe_aci_cmd_set_phy_cfg *cmd; struct libie_aq_desc desc; + bool use_buff_eee_field; + u16 buf_size; int err; if (!cfg) return -EINVAL; + /* If FW supports EEE, we have to use buffer with EEE field. */ + use_buff_eee_field = hw->dev_caps.common_cap.eee_support; + cmd = libie_aq_raw(&desc); /* Ensure that only valid bits of cfg->caps can be turned on. */ cfg->caps &= IXGBE_ACI_PHY_ENA_VALID_MASK; @@ -1109,7 +1114,17 @@ int ixgbe_aci_set_phy_cfg(struct ixgbe_hw *hw, cmd->lport_num = hw->bus.func; desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD); - err = ixgbe_aci_send_cmd(hw, &desc, cfg, sizeof(*cfg)); + if (use_buff_eee_field) + buf_size = sizeof(*cfg); + else + /* Buffer w/o eee_entry_delay field is 2B smaller. */ + buf_size = sizeof(*cfg) - sizeof(u16); + + err = ixgbe_aci_send_cmd(hw, &desc, cfg, buf_size); + + /* 1.40 config format is compatible with pre-1.40, just extends + * it at the end. + */ if (!err) hw->phy.curr_user_phy_cfg = *cfg; diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h index 34f62a416eaa..cfaaf2fcf7ae 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h @@ -382,6 +382,15 @@ struct ixgbe_aci_cmd_set_phy_cfg_data { __le64 phy_type_low; /* Use values from IXGBE_PHY_TYPE_LOW_* */ __le64 phy_type_high; /* Use values from IXGBE_PHY_TYPE_HIGH_* */ u8 caps; + u8 low_power_ctrl_an; + __le16 eee_cap; /* Value from ixgbe_aci_get_phy_caps */ + __le16 eeer_value; /* Use defines from ixgbe_aci_get_phy_caps */ + u8 link_fec_opt; /* Use defines from ixgbe_aci_get_phy_caps */ + u8 module_compliance_enforcement; + __le16 eee_entry_delay; +} __packed; + +/* Set PHY config capabilities (@caps) defines */ #define IXGBE_ACI_PHY_ENA_VALID_MASK 0xef #define IXGBE_ACI_PHY_ENA_TX_PAUSE_ABILITY BIT(0) #define IXGBE_ACI_PHY_ENA_RX_PAUSE_ABILITY BIT(1) @@ -390,12 +399,6 @@ struct ixgbe_aci_cmd_set_phy_cfg_data { #define IXGBE_ACI_PHY_ENA_AUTO_LINK_UPDT BIT(5) #define IXGBE_ACI_PHY_ENA_LESM BIT(6) #define IXGBE_ACI_PHY_ENA_AUTO_FEC BIT(7) - u8 low_power_ctrl_an; - __le16 eee_cap; /* Value from ixgbe_aci_get_phy_caps */ - __le16 eeer_value; /* Use defines from ixgbe_aci_get_phy_caps */ - u8 link_fec_opt; /* Use defines from ixgbe_aci_get_phy_caps */ - u8 module_compliance_enforcement; -}; /* Restart AN command data structure (direct 0x0605) * Also used for response, with only the lport_num field present.