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net: stmmac: report active PHY interface

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Report the active PHY interface from the point of view of the dwmac
hardware to the kernel log, where the core supports reading this.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Tested-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Link: https://patch.msgid.link/E1vl36F-00000006url-1fWA@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Russell King (Oracle) 2026-01-28 10:48:39 +00:00 committed by Jakub Kicinski
parent 88afa0dd65
commit d9009f72ed
6 changed files with 63 additions and 0 deletions
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6
drivers/net/ethernet/stmicro/stmmac/common.h
View File

@ -323,6 +323,10 @@ struct stmmac_safety_stats {
#define PHY_INTF_SEL_SMII 6
#define PHY_INTF_SEL_REVMII 7
/* XGMAC uses a different encoding - from the AgileX5 documentation */
#define PHY_INTF_GMII 0
#define PHY_INTF_RGMII 1
/* MSI defines */
#define STMMAC_MSI_VEC_MAX 32
@ -512,6 +516,8 @@ struct dma_features {
unsigned int dbgmem;
/* Number of Policing Counters */
unsigned int pcsel;
/* Active PHY interface, PHY_INTF_SEL_xxx */
u8 actphyif;
};
/* RX Buffer size must be multiple of 4/8/16 bytes */

2
drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
View File

@ -239,6 +239,8 @@ static int dwmac1000_get_hw_feature(void __iomem *ioaddr,
/* Alternate (enhanced) DESC mode */
dma_cap->enh_desc = (hw_cap & DMA_HW_FEAT_ENHDESSEL) >> 24;
dma_cap->actphyif = FIELD_GET(DMA_HW_FEAT_ACTPHYIF, hw_cap);
return 0;
}

2
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
View File

@ -382,6 +382,8 @@ static int dwmac4_get_hw_feature(void __iomem *ioaddr,
dma_cap->vlins = (hw_cap & GMAC_HW_FEAT_SAVLANINS) >> 27;
dma_cap->arpoffsel = (hw_cap & GMAC_HW_FEAT_ARPOFFSEL) >> 9;
dma_cap->actphyif = FIELD_GET(DMA_HW_FEAT_ACTPHYIF, hw_cap);
/* MAC HW feature1 */
hw_cap = readl(ioaddr + GMAC_HW_FEATURE1);
dma_cap->l3l4fnum = (hw_cap & GMAC_HW_FEAT_L3L4FNUM) >> 27;

1
drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
View File

@ -107,6 +107,7 @@
#define XGMAC_HWFEAT_VXN BIT(29)
#define XGMAC_HWFEAT_SAVLANINS BIT(27)
#define XGMAC_HWFEAT_TSSTSSEL GENMASK(26, 25)
#define XGMAC_HWFEAT_PHYSEL GENMASK(24, 23)
#define XGMAC_HWFEAT_ADDMACADRSEL GENMASK(22, 18)
#define XGMAC_HWFEAT_RXCOESEL BIT(16)
#define XGMAC_HWFEAT_TXCOESEL BIT(14)

1
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
View File

@ -364,6 +364,7 @@ static int dwxgmac2_get_hw_feature(void __iomem *ioaddr,
dma_cap->vxn = (hw_cap & XGMAC_HWFEAT_VXN) >> 29;
dma_cap->vlins = (hw_cap & XGMAC_HWFEAT_SAVLANINS) >> 27;
dma_cap->tssrc = (hw_cap & XGMAC_HWFEAT_TSSTSSEL) >> 25;
dma_cap->actphyif = FIELD_GET(XGMAC_HWFEAT_PHYSEL, hw_cap);
dma_cap->multi_addr = (hw_cap & XGMAC_HWFEAT_ADDMACADRSEL) >> 18;
dma_cap->rx_coe = (hw_cap & XGMAC_HWFEAT_RXCOESEL) >> 16;
dma_cap->tx_coe = (hw_cap & XGMAC_HWFEAT_TXCOESEL) >> 14;

51
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
View File

@ -127,6 +127,22 @@ static unsigned int chain_mode;
module_param(chain_mode, int, 0444);
MODULE_PARM_DESC(chain_mode, "To use chain instead of ring mode");
static const char *stmmac_dwmac_actphyif[8] = {
[PHY_INTF_SEL_GMII_MII] = "GMII/MII",
[PHY_INTF_SEL_RGMII] = "RGMII",
[PHY_INTF_SEL_SGMII] = "SGMII",
[PHY_INTF_SEL_TBI] = "TBI",
[PHY_INTF_SEL_RMII] = "RMII",
[PHY_INTF_SEL_RTBI] = "RTBI",
[PHY_INTF_SEL_SMII] = "SMII",
[PHY_INTF_SEL_REVMII] = "REVMII",
};
static const char *stmmac_dwxgmac_phyif[4] = {
[PHY_INTF_GMII] = "GMII",
[PHY_INTF_RGMII] = "RGMII",
};
static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
/* For MSI interrupts handling */
static irqreturn_t stmmac_mac_interrupt(int irq, void *dev_id);
@ -7270,6 +7286,40 @@ static void stmmac_service_task(struct work_struct *work)
clear_bit(STMMAC_SERVICE_SCHED, &priv->state);
}
static void stmmac_print_actphyif(struct stmmac_priv *priv)
{
const char **phyif_table;
const char *actphyif_str;
size_t phyif_table_size;
switch (priv->plat->core_type) {
case DWMAC_CORE_MAC100:
return;
case DWMAC_CORE_GMAC:
case DWMAC_CORE_GMAC4:
phyif_table = stmmac_dwmac_actphyif;
phyif_table_size = ARRAY_SIZE(stmmac_dwmac_actphyif);
break;
case DWMAC_CORE_XGMAC:
phyif_table = stmmac_dwxgmac_phyif;
phyif_table_size = ARRAY_SIZE(stmmac_dwxgmac_phyif);
break;
}
if (priv->dma_cap.actphyif < phyif_table_size)
actphyif_str = phyif_table[priv->dma_cap.actphyif];
else
actphyif_str = NULL;
if (!actphyif_str)
actphyif_str = "unknown";
dev_info(priv->device, "Active PHY interface: %s (%u)\n",
actphyif_str, priv->dma_cap.actphyif);
}
/**
* stmmac_hw_init - Init the MAC device
* @priv: driver private structure
@ -7326,6 +7376,7 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
else if (priv->dma_cap.rx_coe_type1)
priv->plat->rx_coe = STMMAC_RX_COE_TYPE1;
stmmac_print_actphyif(priv);
} else {
dev_info(priv->device, "No HW DMA feature register supported\n");
}