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drm/amd/display: [FW Promotion] Release 0.1.40.0
Summary for changes in firmware: * Update DCHVM restore sequence for dcn35 * Add 2 new debug polling methods for dchvm "busy" during IPS entry for DCN35 Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Acked-by: Wayne Lin <Wayne.Lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -636,17 +636,29 @@ union pr_debug_flags {
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/**
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* 0x10 (bit 4)
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* @skip_crtc_disabled: CRTC disable skipped
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*/
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uint32_t skip_crtc_disabled : 1;
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/*
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* 0x20 (bit 5)
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* @visual_confirm_rate_control: Enable Visual Confirm rate control detection
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*/
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uint32_t visual_confirm_rate_control : 1;
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uint32_t reserved : 26;
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/**
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* 0x20 (bit 5)
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* @force_full_frame_update: Force all selective updates to be full frame updates
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*/
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uint32_t force_full_frame_update : 1;
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/**
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* 0x40 (bit 6)
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* @force_dpg_on: Force DPG on
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*/
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uint32_t force_dpg_on : 1;
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/**
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* 0x80 (bit 7)
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* @force_hubp_on: Force Hubp on
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*/
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uint32_t force_hubp_on : 1;
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uint32_t reserved : 24;
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} bitfields;
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uint32_t u32All;
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@ -669,19 +681,12 @@ union pr_hw_flags {
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* @fec_enable_status: receive fec enable/disable status from driver
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*/
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uint32_t fec_enable_status : 1;
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/*
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* @smu_optimizations_en: SMU power optimization.
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* Only when active display is Replay capable and display enters Replay.
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* Trigger interrupt to SMU to powerup/down.
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*/
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uint32_t smu_optimizations_en : 1;
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/**
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* @phy_power_state: Indicates current phy power state
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*/
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uint32_t phy_power_state : 1;
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/**
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* @link_power_state: Indicates current link power state
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*/
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@ -698,6 +703,7 @@ union pr_hw_flags {
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* @alpm_mode: Indicates ALPM mode selected
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*/
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uint32_t alpm_mode : 2;
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uint32_t reserved : 23;
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} bitfields;
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uint32_t u32All;
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@ -4279,7 +4285,7 @@ enum pr_state {
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// Active and Pending Power Up
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PR_STATE_2_PENDING_POWER_UP = 0x33,
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// Active and Powered Up, Pending DPG latch
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PR_STATE_2_PENDING_LOCK_FOR_DPG_POWER_ON = 0x34,
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PR_STATE_2_PENDING_LOCK = 0x34,
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// Active and Powered Up, Pending SDP and Unlock
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PR_STATE_2_PENDING_SDP_AND_UNLOCK = 0x35,
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// Pending transmission of AS SDP for timing sync, but no rfb update
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@ -6605,10 +6611,6 @@ struct dmub_cmd_pr_copy_settings_data {
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* Currently the support is only for 0 or 1
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*/
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uint8_t panel_inst;
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/**
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* Length of each horizontal line in ns.
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*/
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uint32_t line_time_in_ns;
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/**
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* PHY instance.
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*/
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@ -6617,10 +6619,10 @@ struct dmub_cmd_pr_copy_settings_data {
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* Determines if SMU optimzations are enabled/disabled.
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*/
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uint8_t smu_optimizations_en;
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/*
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* Use FSM state for Replay power up/down
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/**
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* Length of each horizontal line in ns.
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*/
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uint8_t use_phy_fsm;
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uint32_t line_time_in_ns;
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/*
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* Use FSFT afftet pixel clk
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*/
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@ -6633,6 +6635,14 @@ struct dmub_cmd_pr_copy_settings_data {
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* Use for AUX-less ALPM LFPS wake operation
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*/
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struct dmub_alpm_auxless_data auxless_alpm_data;
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/**
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* DSC Slice height.
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*/
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uint16_t dsc_slice_height;
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/*
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* Use FSM state for Replay power up/down
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*/
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uint8_t use_phy_fsm;
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/**
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* @hpo_stream_enc_inst: HPO stream encoder instance
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*/
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@ -6641,10 +6651,26 @@ struct dmub_cmd_pr_copy_settings_data {
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* @hpo_link_enc_inst: HPO link encoder instance
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*/
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uint8_t hpo_link_enc_inst;
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/*
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* Selective Update granularity needed.
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*/
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uint8_t su_granularity_needed;
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/*
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* Horizontal granularity for Selective Update.
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*/
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uint16_t su_x_granularity;
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/*
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* Extended caps of vertical granularity for Selective Update.
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*/
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uint16_t su_y_granularity_extended_caps;
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/*
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* Vertical granularity for Selective Update.
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*/
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uint8_t su_y_granularity;
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/**
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* @pad: Align structure to 4 byte boundary.
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*/
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uint8_t pad[2];
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uint8_t pad;
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};
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/**
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