From d824ed1307680dd482f607b0e707c575f70668c4 Mon Sep 17 00:00:00 2001 From: Yao Zi Date: Sat, 1 Aug 2026 18:29:53 +0000 Subject: [PATCH] x86/locking: Use sfence for wmb() if SSE is available When adding cc clobber to wmb()'s definition, the alternative() condition to use sfence was incorrectly raised from X86_FEATURE_XMM to X86_FEATURE_XMM2. Restore the correct constraint for potential better performance on machines without SSE2. Fixes: bd922477d935 ("locking/x86: Add cc clobber for ADDL") Signed-off-by: Yao Zi Signed-off-by: Peter Zijlstra (Intel) Cc: stable@vger.kernel.org Link: https://patch.msgid.link/20260801182953.15069-1-me@ziyao.cc --- arch/x86/include/asm/barrier.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h index db70832232d4..3e78bb76153c 100644 --- a/arch/x86/include/asm/barrier.h +++ b/arch/x86/include/asm/barrier.h @@ -17,7 +17,7 @@ #define rmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "lfence", \ X86_FEATURE_XMM2) ::: "memory", "cc") #define wmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "sfence", \ - X86_FEATURE_XMM2) ::: "memory", "cc") + X86_FEATURE_XMM) ::: "memory", "cc") #else #define __mb() asm volatile("mfence":::"memory") #define __rmb() asm volatile("lfence":::"memory")