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x86/xen: Make irq_enable() noinstr
vmlinux.o: warning: objtool: pv_ops[32]: native_irq_enable vmlinux.o: warning: objtool: pv_ops[32]: __raw_callee_save_xen_irq_enable vmlinux.o: warning: objtool: pv_ops[32]: xen_irq_enable_direct vmlinux.o: warning: objtool: lock_is_held_type()+0xfe: call to pv_ops[32]() leaves .noinstr.text section Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Juergen Gross <jgross@suse.com> Link: https://lore.kernel.org/r/20210624095148.872254932@infradead.org
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@ -238,6 +238,11 @@ static noinstr void pv_native_set_debugreg(int regno, unsigned long val)
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{
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native_set_debugreg(regno, val);
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}
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static noinstr void pv_native_irq_enable(void)
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{
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native_irq_enable();
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}
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#endif
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enum paravirt_lazy_mode paravirt_get_lazy_mode(void)
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@ -302,7 +307,7 @@ struct paravirt_patch_template pv_ops = {
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/* Irq ops. */
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.irq.save_fl = __PV_IS_CALLEE_SAVE(native_save_fl),
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.irq.irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable),
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.irq.irq_enable = __PV_IS_CALLEE_SAVE(native_irq_enable),
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.irq.irq_enable = __PV_IS_CALLEE_SAVE(pv_native_irq_enable),
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.irq.safe_halt = native_safe_halt,
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.irq.halt = native_halt,
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#endif /* CONFIG_PARAVIRT_XXL */
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@ -53,7 +53,7 @@ asmlinkage __visible void xen_irq_disable(void)
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}
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PV_CALLEE_SAVE_REGS_THUNK(xen_irq_disable);
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asmlinkage __visible void xen_irq_enable(void)
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asmlinkage __visible noinstr void xen_irq_enable(void)
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{
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struct vcpu_info *vcpu;
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@ -76,7 +76,7 @@ asmlinkage __visible void xen_irq_enable(void)
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preempt_enable();
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}
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PV_CALLEE_SAVE_REGS_THUNK(xen_irq_enable);
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__PV_CALLEE_SAVE_REGS_THUNK(xen_irq_enable, ".noinstr.text");
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static void xen_safe_halt(void)
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{
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@ -21,33 +21,6 @@
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#include <linux/init.h>
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#include <linux/linkage.h>
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/*
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* Enable events. This clears the event mask and tests the pending
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* event status with one and operation. If there are pending events,
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* then enter the hypervisor to get them handled.
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*/
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SYM_FUNC_START(xen_irq_enable_direct)
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FRAME_BEGIN
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/* Unmask events */
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movb $0, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
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/*
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* Preempt here doesn't matter because that will deal with any
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* pending interrupts. The pending check may end up being run
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* on the wrong CPU, but that doesn't hurt.
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*/
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/* Test for pending */
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testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending
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jz 1f
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call check_events
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1:
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FRAME_END
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ret
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SYM_FUNC_END(xen_irq_enable_direct)
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/*
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* Disabling events is simply a matter of making the event mask
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* non-zero.
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@ -57,6 +30,8 @@ SYM_FUNC_START(xen_irq_disable_direct)
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ret
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SYM_FUNC_END(xen_irq_disable_direct)
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.pushsection .noinstr.text, "ax"
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/*
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* Force an event check by making a hypercall, but preserve regs
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* before making the call.
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@ -86,7 +61,32 @@ SYM_FUNC_START(check_events)
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ret
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SYM_FUNC_END(check_events)
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.pushsection .noinstr.text, "ax"
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/*
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* Enable events. This clears the event mask and tests the pending
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* event status with one and operation. If there are pending events,
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* then enter the hypervisor to get them handled.
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*/
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SYM_FUNC_START(xen_irq_enable_direct)
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FRAME_BEGIN
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/* Unmask events */
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movb $0, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
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/*
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* Preempt here doesn't matter because that will deal with any
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* pending interrupts. The pending check may end up being run
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* on the wrong CPU, but that doesn't hurt.
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*/
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/* Test for pending */
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testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending
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jz 1f
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call check_events
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1:
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FRAME_END
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ret
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SYM_FUNC_END(xen_irq_enable_direct)
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/*
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* (xen_)save_fl is used to get the current interrupt enable status.
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* Callers expect the status to be in X86_EFLAGS_IF, and other bits
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