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KVM: riscv: Update G-stage PTE permissions atomically
When a fault hits an existing G-stage leaf with the same PFN, KVM only needs to update the PTE permissions. This path will be used by read-side fault handling, so it must not overwrite a concurrent PTE update. Use the cmpxchg helper when relaxing permissions on an existing leaf, following the same concurrency model used by x86 for atomic SPTE permission updates. Retry if another CPU changed the PTE first, and use cpu_relax() while spinning. Signed-off-by: Jinyu Tang <tjytimi@163.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260517153427.94889-5-tjytimi@163.com Signed-off-by: Anup Patel <anup@brainfault.org>
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@ -182,17 +182,22 @@ int kvm_riscv_gstage_set_pte(struct kvm_gstage *gstage,
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static void kvm_riscv_gstage_update_pte_prot(struct kvm_gstage *gstage, u32 level,
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gpa_t addr, pte_t *ptep, pgprot_t prot)
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{
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pte_t new_pte;
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pte_t old_pte, new_pte;
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if (pgprot_val(pte_pgprot(ptep_get(ptep))) == pgprot_val(prot))
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return;
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for (;;) {
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old_pte = ptep_get(ptep);
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if (pgprot_val(pte_pgprot(old_pte)) == pgprot_val(prot))
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return;
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new_pte = pfn_pte(pte_pfn(ptep_get(ptep)), prot);
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new_pte = pte_mkdirty(new_pte);
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new_pte = pfn_pte(pte_pfn(old_pte), prot);
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new_pte = pte_mkdirty(new_pte);
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set_pte(ptep, new_pte);
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if (kvm_riscv_gstage_try_update_pte(gstage, level, addr, ptep,
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old_pte, new_pte))
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return;
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gstage_tlb_flush(gstage, level, addr);
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cpu_relax();
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}
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}
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int kvm_riscv_gstage_map_page(struct kvm_gstage *gstage,
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