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ARM: tegra: parent sclk on pll_m_out1 so it can run @ 240Mhz

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Since sclk no longer needs pll_p_out4, don't explicitly enable it.

Change-Id: I47debdd3402e02967f77ebd4c3b8c4594ece4083
Signed-off-by: Dima Zavin <dima@android.com>
This commit is contained in:
Dima Zavin 2010-10-01 20:01:42 -07:00 committed by Colin Cross
parent 8f84cdf950
commit d7675db725
1 changed files with 4 additions and 4 deletions
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8
arch/arm/mach-tegra/common.c
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@ -42,10 +42,10 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
{ "pll_p_out1", "pll_p", 28800000, true },
{ "pll_p_out2", "pll_p", 48000000, true },
{ "pll_p_out3", "pll_p", 72000000, true },
{ "pll_p_out4", "pll_p", 108000000, true },
{ "sclk", "pll_p_out4", 108000000, true },
{ "hclk", "sclk", 108000000, true },
{ "pclk", "hclk", 54000000, true },
{ "pll_m_out1", "pll_m", 240000000, true },
{ "sclk", "pll_m_out1", 240000000, true },
{ "hclk", "sclk", 240000000, true },
{ "pclk", "hclk", 120000000, true },
{ "pll_u", "clk_m", 480000000, false },
{ "sdmmc1", "pll_p", 48000000, false},
{ "sdmmc2", "pll_p", 48000000, false},