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i2c: designware: Remove not-going-to-be-supported code for Baikal SoC

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As noticed in the discussion [1] the Baikal SoC and platforms
are not going to be finalized, hence remove stale code.

Link: https://lore.kernel.org/lkml/22b92ddf-6321-41b5-8073-f9c7064d3432@infradead.org/ [1]
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://lore.kernel.org/r/20260114081954.252160-2-andriy.shevchenko@linux.intel.com
This commit is contained in:
Andy Shevchenko 2026-01-14 09:17:50 +01:00 committed by Andi Shyti
parent 7b5073f989
commit d70f60ad96
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GPG Key ID: DA78056626D32D6E
3 changed files with 0 additions and 70 deletions
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1
drivers/i2c/busses/Kconfig
View File

@ -579,7 +579,6 @@ if I2C_DESIGNWARE_CORE
config I2C_DESIGNWARE_PLATFORM config I2C_DESIGNWARE_PLATFORM
tristate "Synopsys DesignWare Platform driver" tristate "Synopsys DesignWare Platform driver"
depends on (ACPI && COMMON_CLK) || !ACPI depends on (ACPI && COMMON_CLK) || !ACPI
select MFD_SYSCON if MIPS_BAIKAL_T1
default I2C_DESIGNWARE_CORE default I2C_DESIGNWARE_CORE
help help
If you say yes to this option, support will be included for the If you say yes to this option, support will be included for the

1
drivers/i2c/busses/i2c-designware-core.h
View File

@ -314,7 +314,6 @@ struct dw_i2c_dev {
#define ACCESS_POLLING BIT(3) #define ACCESS_POLLING BIT(3)
#define MODEL_MSCC_OCELOT BIT(8) #define MODEL_MSCC_OCELOT BIT(8)
#define MODEL_BAIKAL_BT1 BIT(9)
#define MODEL_AMD_NAVI_GPU BIT(10) #define MODEL_AMD_NAVI_GPU BIT(10)
#define MODEL_WANGXUN_SP BIT(11) #define MODEL_WANGXUN_SP BIT(11)
#define MODEL_MASK GENMASK(11, 8) #define MODEL_MASK GENMASK(11, 8)

68
drivers/i2c/busses/i2c-designware-platdrv.c
View File

@ -37,70 +37,6 @@ static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
return clk_get_rate(dev->clk) / HZ_PER_KHZ; return clk_get_rate(dev->clk) / HZ_PER_KHZ;
} }
#ifdef CONFIG_OF
#define BT1_I2C_CTL 0x100
#define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0)
#define BT1_I2C_CTL_WR BIT(8)
#define BT1_I2C_CTL_GO BIT(31)
#define BT1_I2C_DI 0x104
#define BT1_I2C_DO 0x108
static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val)
{
struct dw_i2c_dev *dev = context;
int ret;
/*
* Note these methods shouldn't ever fail because the system controller
* registers are memory mapped. We check the return value just in case.
*/
ret = regmap_write(dev->sysmap, BT1_I2C_CTL,
BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK));
if (ret)
return ret;
return regmap_read(dev->sysmap, BT1_I2C_DO, val);
}
static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val)
{
struct dw_i2c_dev *dev = context;
int ret;
ret = regmap_write(dev->sysmap, BT1_I2C_DI, val);
if (ret)
return ret;
return regmap_write(dev->sysmap, BT1_I2C_CTL,
BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK));
}
static const struct regmap_config bt1_i2c_cfg = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
.fast_io = true,
.reg_read = bt1_i2c_read,
.reg_write = bt1_i2c_write,
.max_register = DW_IC_COMP_TYPE,
};
static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
{
dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent);
if (IS_ERR(dev->sysmap))
return PTR_ERR(dev->sysmap);
dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg);
return PTR_ERR_OR_ZERO(dev->map);
}
#else
static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
{
return -ENODEV;
}
#endif
static int dw_i2c_get_parent_regmap(struct dw_i2c_dev *dev) static int dw_i2c_get_parent_regmap(struct dw_i2c_dev *dev)
{ {
dev->map = dev_get_regmap(dev->dev->parent, NULL); dev->map = dev_get_regmap(dev->dev->parent, NULL);
@ -127,9 +63,6 @@ static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev)
return dw_i2c_get_parent_regmap(dev); return dw_i2c_get_parent_regmap(dev);
switch (dev->flags & MODEL_MASK) { switch (dev->flags & MODEL_MASK) {
case MODEL_BAIKAL_BT1:
ret = bt1_i2c_request_regs(dev);
break;
case MODEL_WANGXUN_SP: case MODEL_WANGXUN_SP:
ret = dw_i2c_get_parent_regmap(dev); ret = dw_i2c_get_parent_regmap(dev);
break; break;
@ -334,7 +267,6 @@ static void dw_i2c_plat_remove(struct platform_device *pdev)
} }
static const struct of_device_id dw_i2c_of_match[] = { static const struct of_device_id dw_i2c_of_match[] = {
{ .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
{ .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT }, { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
{ .compatible = "snps,designware-i2c" }, { .compatible = "snps,designware-i2c" },
{} {}