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dt-bindings: gpio: fairchild,74hc595: add lines-initial-states property

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The 74HC595 and 74LVC594 shift registers latch their outputs until the
first serial write, so boards that depend on a specific power-on pattern
(for example active-low indicators, reset lines, or other signals that
must come up non-zero) have no way to express that today: the Linux
driver always writes zeros from its zero-initialised buffer during
probe.

Document support for the existing lines-initial-states bitmask, already
defined for nxp,pcf8575, so the same convention covers this output-only
device. Bit N corresponds to GPIO line N. Because the 74HC595/74LVC594
family is push-pull output only (no input mode, no high-impedance state
under software control), bit=0 drives the line low and bit=1 drives it
high; this differs from nxp,pcf8575, where the 0/1 polarity reflects the
quasi-bidirectional nature of that part.

The bitmask covers up to 32 lines, which fits the typical 1-4 chip
cascades that appear in tree. Should longer chains require seeding in
the future, the property can be extended to a uint32-array without
breaking the bit-N-equals-line-N convention.

Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chanhong Jung <happycpu@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Link: https://patch.msgid.link/20260429035134.1023330-2-happycpu@gmail.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
This commit is contained in:
Chanhong Jung 2026-04-29 12:51:33 +09:00 committed by Bartosz Golaszewski
parent 3a33394e8a
commit d6e1a94888
1 changed files with 13 additions and 0 deletions
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13
Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml
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@ -45,6 +45,18 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
description: Number of daisy-chained shift registers
lines-initial-states:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Bitmask that specifies the initial state of each output line, written
by the driver before the gpiochip is registered. Bit N corresponds to
GPIO line N, following the convention already documented for
nxp,pcf8575. Because the 74HC595/74LVC594 family is push-pull output
only, a bit set to zero drives the line low and a bit set to one
drives it high. The bitmask covers up to 32 lines (four cascaded
registers); outputs beyond that come up zeroed. When the property is
absent all outputs come up low, preserving the previous behaviour.
enable-gpios:
description: GPIO connected to the OE (Output Enable) pin.
maxItems: 1
@ -79,6 +91,7 @@ examples:
gpio-controller;
#gpio-cells = <2>;
registers-number = <4>;
lines-initial-states = <0xffff0000>;
spi-max-frequency = <100000>;
};
};