From 1bec3bd1f839f269dfdec3c635dd2afe15e30995 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Sun, 21 Dec 2025 19:05:10 +0800 Subject: [PATCH 1/8] arm64: dts: allwinner: sun55i: Add SPI controllers The A523 family SoCs have four SPI controllers. One of them also supports DBI mode. Add device nodes for all of them. Also add pinmux nodes for spi0 on the PC pins, which is commonly used for SPI-NOR boot flash. Acked-by: Jernej Skrabec Link: https://patch.msgid.link/20251221110513.1850535-4-wens@kernel.org Signed-off-by: Chen-Yu Tsai --- .../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 94 +++++++++++++++++++ 1 file changed, 94 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi index 42dab01e3f56..9335977751e2 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -214,6 +214,43 @@ spdif_out_pi_pin: spdif-pi-pin { allwinner,pinmux = <2>; }; + /omit-if-no-ref/ + spi0_pc_pins: spi0-pc-pins { + pins = "PC2", "PC4", "PC12"; + function = "spi0"; + allwinner,pinmux = <4>; + }; + + /omit-if-no-ref/ + spi0_cs0_pc_pin: spi0-cs0-pc-pin { + pins = "PC3"; + function = "spi0"; + allwinner,pinmux = <4>; + }; + + /omit-if-no-ref/ + spi0_cs1_pc_pin: spi0-cs1-pc-pin { + pins = "PC7"; + function = "spi0"; + allwinner,pinmux = <4>; + }; + + /omit-if-no-ref/ + spi0_hold_pc_pin: spi0-hold-pc-pin { + /* conflicts with eMMC D7 */ + pins = "PC16"; + function = "spi0"; + allwinner,pinmux = <4>; + }; + + /omit-if-no-ref/ + spi0_wp_pc_pin: spi0-wp-pc-pin { + /* conflicts with eMMC D2 */ + pins = "PC15"; + function = "spi0"; + allwinner,pinmux = <4>; + }; + uart0_pb_pins: uart0-pb-pins { pins = "PB9", "PB10"; allwinner,pinmux = <2>; @@ -563,6 +600,49 @@ mmc2: mmc@4022000 { #size-cells = <0>; }; + spi0: spi@4025000 { + compatible = "allwinner,sun55i-a523-spi"; + reg = <0x04025000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; + clock-names = "ahb", "mod"; + dmas = <&dma 22>, <&dma 22>; + dma-names = "rx", "tx"; + resets = <&ccu RST_BUS_SPI0>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi1: spi@4026000 { + compatible = "allwinner,sun55i-a523-spi-dbi", + "allwinner,sun55i-a523-spi"; + reg = <0x04026000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; + clock-names = "ahb", "mod"; + dmas = <&dma 23>, <&dma 23>; + dma-names = "rx", "tx"; + resets = <&ccu RST_BUS_SPI1>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi2: spi@4027000 { + compatible = "allwinner,sun55i-a523-spi"; + reg = <0x04027000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>; + clock-names = "ahb", "mod"; + dmas = <&dma 24>, <&dma 24>; + dma-names = "rx", "tx"; + resets = <&ccu RST_BUS_SPI2>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + usb_otg: usb@4100000 { compatible = "allwinner,sun55i-a523-musb", "allwinner,sun8i-a33-musb"; @@ -815,6 +895,20 @@ rtc: rtc@7090000 { #clock-cells = <1>; }; + r_spi0: spi@7092000 { + compatible = "allwinner,sun55i-a523-spi"; + reg = <0x07092000 0x1000>; + interrupts = ; + clocks = <&r_ccu CLK_BUS_R_SPI>, <&r_ccu CLK_R_SPI>; + clock-names = "ahb", "mod"; + dmas = <&dma 53>, <&dma 53>; + dma-names = "rx", "tx"; + resets = <&r_ccu RST_BUS_R_SPI>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + mcu_ccu: clock-controller@7102000 { compatible = "allwinner,sun55i-a523-mcu-ccu"; reg = <0x7102000 0x200>; From bd14ba160bbe863e7b7bc489fd947ae1cdc03047 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Sun, 21 Dec 2025 19:05:11 +0800 Subject: [PATCH 2/8] arm64: dts: allwinner: t527: orangepi-4a: Enable SPI-NOR flash The Orangepi 4A has a SPI-NOR flash connected to spi0 on the PC pins. The HOLD and WP pins are not connected, and are instead pulled up by the supply rail. Enable spi0 and add a device node for the SPI-NOR flash. Acked-by: Jernej Skrabec Link: https://patch.msgid.link/20251221110513.1850535-5-wens@kernel.org Signed-off-by: Chen-Yu Tsai --- .../dts/allwinner/sun55i-t527-orangepi-4a.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts index 9e6b21cf293e..055be86e5fae 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts @@ -400,6 +400,21 @@ &rtc { assigned-clock-rates = <32768>; }; +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pc_pins>, <&spi0_cs0_pc_pin>; + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + vcc-supply = <®_cldo1>; + }; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>; From 0b2761eb1287bd9f62367cccf6626eb3107cef6f Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Thu, 25 Dec 2025 18:36:14 +0800 Subject: [PATCH 3/8] ARM: dts: allwinner: sun5i-a13-utoo-p66: delete "power-gpios" property The P66's device tree includes the reference design dtsi files, which defines a node and properties for the touchpanel in the common design. The P66 dts file then overrides all the properties to match its own design, but as the touchpanel model is different, a different schema is matched. This other schema uses a different name for the GPIO. The original submission added the correct GPIO property, but did not delete the one inherited from the reference design, causing validation errors. Explicitly delete the incorrect GPIO property. Fixes: 2a53aff27236 ("ARM: dts: sun5i: Enable touchscreen on Utoo P66") Reviewed-by: Jernej Skrabec Link: https://patch.msgid.link/20251225103616.3203473-4-wens@kernel.org Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/allwinner/sun5i-a13-utoo-p66.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/allwinner/sun5i-a13-utoo-p66.dts b/arch/arm/boot/dts/allwinner/sun5i-a13-utoo-p66.dts index be486d28d04f..428cab5a0e90 100644 --- a/arch/arm/boot/dts/allwinner/sun5i-a13-utoo-p66.dts +++ b/arch/arm/boot/dts/allwinner/sun5i-a13-utoo-p66.dts @@ -102,6 +102,7 @@ &touchscreen { /* The P66 uses a different EINT then the reference design */ interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */ /* The icn8318 binding expects wake-gpios instead of power-gpios */ + /delete-property/ power-gpios; wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ touchscreen-size-x = <800>; touchscreen-size-y = <480>; From 4d9af1e12cd6462c53aa91b6a0b6af7861e1c0ce Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 29 Oct 2023 16:26:57 -0500 Subject: [PATCH 4/8] arm64: dts: allwinner: a100: Add LED controller node Allwinner A100 contains an LED controller. Add it to the devicetree. Acked-by: Guo Ren Reviewed-by: Jernej Skrabec Signed-off-by: Samuel Holland Link: https://patch.msgid.link/20231029212738.7871-4-samuel@sholland.org [wens@kernel.org: resolve conflict; move "status" to end of properties] Signed-off-by: Chen-Yu Tsai --- arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index bb5f9e4f3d42..b3fb1e0ee796 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -420,6 +420,20 @@ i2c3: i2c@5002c00 { #size-cells = <0>; }; + ledc: led-controller@5018000 { + compatible = "allwinner,sun50i-a100-ledc"; + reg = <0x5018000 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_LEDC>, <&ccu CLK_LEDC>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_LEDC>; + dmas = <&dma 42>; + dma-names = "tx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + emac0: ethernet@5020000 { compatible = "allwinner,sun50i-a100-emac", "allwinner,sun50i-a64-emac"; From c8e75e0cecd277fb585d4491a6eeaaff64546f10 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 29 Oct 2023 16:26:58 -0500 Subject: [PATCH 5/8] riscv: dts: allwinner: d1: Add LED controller node Allwinner D1 contains an LED controller. Add its devicetree node, as well as the pinmux used by the reference board design. Acked-by: Guo Ren Reviewed-by: Jernej Skrabec Tested-by: Trevor Woerner Signed-off-by: Samuel Holland Link: https://patch.msgid.link/20231029212738.7871-5-samuel@sholland.org [wens@kernel.org: move "status" to end of properties] Signed-off-by: Chen-Yu Tsai --- arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi | 6 ++++++ arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 15 +++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi index b18f368e06e0..b0fb0ea377bc 100644 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi @@ -58,6 +58,12 @@ i2c2_pb0_pins: i2c2-pb0-pins { function = "i2c2"; }; + /omit-if-no-ref/ + ledc_pc0_pin: ledc-pc0-pin { + pins = "PC0"; + function = "ledc"; + }; + /omit-if-no-ref/ uart0_pb8_pins: uart0-pb8-pins { pins = "PB8", "PB9"; diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index 63e252b44973..895b89a83e75 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -204,6 +204,21 @@ ccu: clock-controller@2001000 { #reset-cells = <1>; }; + ledc: led-controller@2008000 { + compatible = "allwinner,sun20i-d1-ledc", + "allwinner,sun50i-a100-ledc"; + reg = <0x2008000 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_LEDC>, <&ccu CLK_LEDC>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_LEDC>; + dmas = <&dma 42>; + dma-names = "tx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + gpadc: adc@2009000 { compatible = "allwinner,sun20i-d1-gpadc"; reg = <0x2009000 0x400>; From f8ad8bbb8827c5bfd83bdf5e1ab512d2dc5db643 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 29 Oct 2023 16:26:59 -0500 Subject: [PATCH 6/8] riscv: dts: allwinner: d1: Add RGB LEDs to boards Some D1-based boards feature an onboard RGB LED. Enable them. Acked-by: Guo Ren Acked-by: Jernej Skrabec Tested-by: Trevor Woerner Signed-off-by: Samuel Holland Link: https://patch.msgid.link/20231029212738.7871-6-samuel@sholland.org Signed-off-by: Chen-Yu Tsai --- .../boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dts | 12 ++++++++++++ arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts | 13 +++++++++++++ 2 files changed, 25 insertions(+) diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dts b/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dts index 08cf716328a0..feaa75d5aead 100644 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dts +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dts @@ -59,6 +59,18 @@ &ehci1 { status = "okay"; }; +&ledc { + pinctrl-0 = <&ledc_pc0_pin>; + pinctrl-names = "default"; + status = "okay"; + + multi-led@0 { + reg = <0x0>; + color = ; + function = LED_FUNCTION_STATUS; + }; +}; + &mmc1 { bus-width = <4>; mmc-pwrseq = <&wifi_pwrseq>; diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts b/arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts index 8dbe717c79ce..73840ea300f0 100644 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts @@ -22,6 +22,7 @@ #include #include +#include /dts-v1/; @@ -121,6 +122,18 @@ pcf8574a: gpio@38 { }; }; +&ledc { + pinctrl-0 = <&ledc_pc0_pin>; + pinctrl-names = "default"; + status = "okay"; + + multi-led@0 { + reg = <0x0>; + color = ; + function = LED_FUNCTION_STATUS; + }; +}; + &mdio { ext_rgmii_phy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; From db5e9260be8d3437222df74b5074359b22f1f029 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Thu, 25 Dec 2025 18:36:15 +0800 Subject: [PATCH 7/8] ARM: dts: allwinner: Replace status "failed" with "fail" The device tree bindings specify using "fail", not "failed". Fix up all the ones that are wrong. Link: https://patch.msgid.link/20251225103616.3203473-5-wens@kernel.org Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/allwinner/sun4i-a10-dserve-dsrv9703c.dts | 2 +- arch/arm/boot/dts/allwinner/sun4i-a10-pov-protab2-ips9.dts | 2 +- arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts | 2 +- arch/arm/boot/dts/allwinner/sun6i-a31s-primo81.dts | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/allwinner/sun4i-a10-dserve-dsrv9703c.dts b/arch/arm/boot/dts/allwinner/sun4i-a10-dserve-dsrv9703c.dts index 63e77c05bfda..f2413ba6a858 100644 --- a/arch/arm/boot/dts/allwinner/sun4i-a10-dserve-dsrv9703c.dts +++ b/arch/arm/boot/dts/allwinner/sun4i-a10-dserve-dsrv9703c.dts @@ -112,7 +112,7 @@ axp209: pmic@34 { &i2c1 { /* pull-ups and devices require AXP209 LDO3 */ - status = "failed"; + status = "fail"; }; &i2c2 { diff --git a/arch/arm/boot/dts/allwinner/sun4i-a10-pov-protab2-ips9.dts b/arch/arm/boot/dts/allwinner/sun4i-a10-pov-protab2-ips9.dts index c32596947647..e0c7099015da 100644 --- a/arch/arm/boot/dts/allwinner/sun4i-a10-pov-protab2-ips9.dts +++ b/arch/arm/boot/dts/allwinner/sun4i-a10-pov-protab2-ips9.dts @@ -96,7 +96,7 @@ axp209: pmic@34 { &i2c1 { /* pull-ups and devices require AXP209 LDO3 */ - status = "failed"; + status = "fail"; }; &i2c2 { diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts index 5bce7a32651e..5dfd36e3a49d 100644 --- a/arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts +++ b/arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts @@ -170,7 +170,7 @@ hdmi_out_con: endpoint { &i2c0 { /* pull-ups and devices require AXP221 DLDO3 */ - status = "failed"; + status = "fail"; }; &i2c1 { diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31s-primo81.dts b/arch/arm/boot/dts/allwinner/sun6i-a31s-primo81.dts index b32b70ada7fd..fefd887fbc39 100644 --- a/arch/arm/boot/dts/allwinner/sun6i-a31s-primo81.dts +++ b/arch/arm/boot/dts/allwinner/sun6i-a31s-primo81.dts @@ -90,7 +90,7 @@ hdmi_out_con: endpoint { &i2c0 { /* pull-ups and device VDDIO use AXP221 DLDO3 */ - status = "failed"; + status = "fail"; }; &i2c1 { From f36e738549d483878ebf4cc9826c46d9dc4aa496 Mon Sep 17 00:00:00 2001 From: Alex Studer Date: Tue, 13 Jan 2026 19:29:48 +0100 Subject: [PATCH 8/8] riscv: dts: allwinner: d1: Add CPU thermal sensor and zone The sun20i THS (built in CPU thermal sensor) is supported in code, but was never added to the device tree. So, add it to the device tree, along with a thermal zone for the CPU. Signed-off-by: Alex Studer Changes since v1: - Move include before defines in sun20i-d1s.dtsi - Fix register size for thermal-sensor@2009400 - Move thermal-sensor@2009400 in SoC to match register address sorting - Add thermal-zone for sun8i-t113s.dtsi and fix missing cooling-cells Link: https://lore.kernel.org/r/20250218020629.1476126-1-alex@studer.dev Signed-off-by: Lukas Schmid Link: https://patch.msgid.link/20260113182951.1059690-1-lukas.schmid@netcube.li Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi | 33 +++++++++++++++++++ arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 31 +++++++++++++++++ .../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 16 +++++++++ 3 files changed, 80 insertions(+) diff --git a/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi index c7181308ae6f..424f4a2487e2 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi @@ -4,6 +4,7 @@ #define SOC_PERIPHERAL_IRQ(nr) GIC_SPI nr #include +#include #include #include @@ -20,6 +21,7 @@ cpu0: cpu@0 { reg = <0>; clocks = <&ccu CLK_CPUX>; clock-names = "cpu"; + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -28,6 +30,7 @@ cpu1: cpu@1 { reg = <1>; clocks = <&ccu CLK_CPUX>; clock-names = "cpu"; + #cooling-cells = <2>; }; }; @@ -56,4 +59,34 @@ pmu { ; interrupt-affinity = <&cpu0>, <&cpu1>; }; + + thermal-zones { + cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths>; + + cooling-maps { + map0 { + trip = <&cpu_alert>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + + trips { + cpu_alert: cpu-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu-crit { + temperature = <100000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; }; diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi index a7442a508433..3f4ee820ef56 100644 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi @@ -1,6 +1,8 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) // Copyright (C) 2021-2022 Samuel Holland +#include + #define SOC_PERIPHERAL_IRQ(nr) (nr + 16) #include "sunxi-d1s-t113.dtsi" @@ -115,4 +117,33 @@ pmu { <0x00000000 0x0000000e 0xffffffff 0xffffffff 0x00010000>, <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x00020000>; }; + + thermal-zones { + cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths>; + + cooling-maps { + map0 { + trip = <&cpu_alert>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + + trips { + cpu_alert: cpu-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu-crit { + temperature = <100000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; }; diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index 895b89a83e75..82cc85acccb1 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -229,6 +229,18 @@ gpadc: adc@2009000 { #io-channel-cells = <1>; }; + ths: thermal-sensor@2009400 { + compatible = "allwinner,sun20i-d1-ths"; + reg = <0x2009400 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_THS>; + clock-names = "bus"; + resets = <&ccu RST_BUS_THS>; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + #thermal-sensor-cells = <0>; + }; + dmic: dmic@2031000 { compatible = "allwinner,sun20i-d1-dmic", "allwinner,sun50i-h6-dmic"; @@ -489,6 +501,10 @@ sid: efuse@3006000 { reg = <0x3006000 0x1000>; #address-cells = <1>; #size-cells = <1>; + + ths_calibration: thermal-sensor-calibration@14 { + reg = <0x14 0x8>; + }; }; crypto: crypto@3040000 {