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drm/xe: Add pagefault chaining stats
Add GT stats to quantify pagefault chaining behavior during fault storms. Track total chained faults, faults chained directly from the IRQ handler, cases where IRQ chaining also drained the queue, chained faults that had to be requeued due to range mismatch, and cases where the last serviced range allowed immediate ack. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Maciej Patelczyk <maciej.patelczyk@intel.com> Link: https://patch.msgid.link/20260806185202.3922432-10-matthew.brost@intel.com
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@ -95,6 +95,11 @@ void xe_gt_stats_incr(struct xe_gt *gt, const enum xe_gt_stats_id id, int incr)
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#define DEF_STAT_STR(ID, name) [XE_GT_STATS_ID_##ID] = name
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static const char *const stat_description[__XE_GT_STATS_NUM_IDS] = {
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DEF_STAT_STR(CHAIN_PAGEFAULT_COUNT, "chain_pagefault_count"),
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DEF_STAT_STR(CHAIN_IRQ_PAGEFAULT_COUNT, "chain_irq_pagefault_count"),
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DEF_STAT_STR(CHAIN_DRAIN_IRQ_PAGEFAULT_COUNT, "chain_drain_irq_pagefault_count"),
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DEF_STAT_STR(CHAIN_MISMATCH_PAGEFAULT_COUNT, "chain_mismatch_pagefault_count"),
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DEF_STAT_STR(LAST_PAGEFAULT_COUNT, "last_pagefault_count"),
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DEF_STAT_STR(SVM_PAGEFAULT_COUNT, "svm_pagefault_count"),
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DEF_STAT_STR(TLB_INVAL, "tlb_inval_count"),
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DEF_STAT_STR(SVM_TLB_INVAL_COUNT, "svm_tlb_inval_count"),
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@ -10,6 +10,17 @@
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/**
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* enum xe_gt_stats_id - GT statistics identifiers
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* @XE_GT_STATS_ID_CHAIN_PAGEFAULT_COUNT: Total page faults chained onto an
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* in-flight fault instead of being queued separately.
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* @XE_GT_STATS_ID_CHAIN_IRQ_PAGEFAULT_COUNT: Page faults chained directly from
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* the IRQ handler.
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* @XE_GT_STATS_ID_CHAIN_DRAIN_IRQ_PAGEFAULT_COUNT: IRQ-handler chained faults
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* that also drained the fault queue.
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* @XE_GT_STATS_ID_CHAIN_MISMATCH_PAGEFAULT_COUNT: Chained faults requeued
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* because their fault range did not match the fault they were chained onto.
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* @XE_GT_STATS_ID_LAST_PAGEFAULT_COUNT: Faults whose range matched the last
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* serviced range, allowing an immediate ack.
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*
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* @XE_GT_STATS_ID_SVM_PAGEFAULT_COUNT: Total SVM page faults handled.
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* @XE_GT_STATS_ID_TLB_INVAL: Total GPU Translation Lookaside Buffer (TLB)
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* invalidations issued.
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@ -129,6 +140,11 @@
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* See Documentation/gpu/xe/xe_gt_stats.rst.
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*/
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enum xe_gt_stats_id {
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XE_GT_STATS_ID_CHAIN_PAGEFAULT_COUNT,
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XE_GT_STATS_ID_CHAIN_IRQ_PAGEFAULT_COUNT,
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XE_GT_STATS_ID_CHAIN_DRAIN_IRQ_PAGEFAULT_COUNT,
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XE_GT_STATS_ID_CHAIN_MISMATCH_PAGEFAULT_COUNT,
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XE_GT_STATS_ID_LAST_PAGEFAULT_COUNT,
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XE_GT_STATS_ID_SVM_PAGEFAULT_COUNT,
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XE_GT_STATS_ID_TLB_INVAL,
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XE_GT_STATS_ID_SVM_TLB_INVAL_COUNT,
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@ -351,6 +351,8 @@ xe_pagefault_queue_unchain_requeue(struct xe_pagefault_queue *pf_queue,
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xe_assert(xe, pf->consumer.alloc_state ==
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XE_PAGEFAULT_ALLOC_STATE_CHAINED);
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xe_gt_stats_incr(gt, XE_GT_STATS_ID_CHAIN_MISMATCH_PAGEFAULT_COUNT, 1);
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pf->consumer.alloc_state = XE_PAGEFAULT_ALLOC_STATE_FREE;
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lpf = xe_pagefault_queue_add(pf_queue, pf);
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if (lpf) {
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@ -407,6 +409,10 @@ static bool xe_pagefault_try_chain(struct xe_pagefault_queue *pf_queue,
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xe_assert(xe, pf_work->cache.pf->consumer.alloc_state ==
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XE_PAGEFAULT_ALLOC_STATE_ACTIVE);
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xe_gt_stats_incr(pf->gt,
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XE_GT_STATS_ID_CHAIN_PAGEFAULT_COUNT,
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1);
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pf->consumer.alloc_state =
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XE_PAGEFAULT_ALLOC_STATE_CHAINED;
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pf->consumer.next = pf_work->cache.pf->consumer.next;
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@ -582,8 +588,10 @@ static void xe_pagefault_queue_work(struct work_struct *w)
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bool invalidated = false;
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/* Last fault same address, ack immediately */
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if (xe_pagefault_match(pf, cache_start, cache_end, cache_asid))
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if (xe_pagefault_match(pf, cache_start, cache_end, cache_asid)) {
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xe_gt_stats_incr(gt, XE_GT_STATS_ID_LAST_PAGEFAULT_COUNT, 1);
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goto ack_fault;
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}
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err = xe_pagefault_service(pf);
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@ -841,8 +849,15 @@ int xe_pagefault_handler(struct xe_device *xe, struct xe_pagefault *pf)
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lpf->consumer.next = NULL;
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if (xe_pagefault_try_chain(pf_queue, lpf)) {
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if (empty)
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xe_gt_stats_incr(pf->gt,
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XE_GT_STATS_ID_CHAIN_IRQ_PAGEFAULT_COUNT,
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1);
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if (empty) {
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xe_gt_stats_incr(pf->gt,
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XE_GT_STATS_ID_CHAIN_DRAIN_IRQ_PAGEFAULT_COUNT,
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1);
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xe_pagefault_queue_advance(pf_queue);
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}
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} else {
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int work_index = xe_pagefault_work_index(xe);
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