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arm64: dts: rockchip: extent bus-ranges of PCIe for rk3399

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In order to support multiple hierarchy of PCIe buses,
for instance, PCIe switch, we need to extent bus-ranges
to as max as possible. We have 32 regions and could support
up to 31 buses except bus 0 for our root bridge.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Shawn Lin 2017-05-16 14:30:40 +08:00 committed by Heiko Stuebner
parent b74a2e98dc
commit d633becc58
1 changed files with 1 additions and 1 deletions
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arch/arm64/boot/dts/rockchip/rk3399.dtsi
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@ -220,7 +220,7 @@ pcie0: pcie@f8000000 {
#size-cells = <2>;
#interrupt-cells = <1>;
aspm-no-l0s;
bus-range = <0x0 0x1>;
bus-range = <0x0 0x1f>;
clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
<&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
clock-names = "aclk", "aclk-perf",