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wifi: rtw89: pci: use RDU status of R_BE_PCIE_DMA_IMR_0_V1 instead for 8922DE

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The original RDU status of R_BE_HAXI_HIMR00 needs additional IO to get
the status. The new WiFi 7 8922DE add the status to R_BE_PCIE_DMA_IMR_0_V1
which is read already, so we can reduce one reading IO.

After the changes, interrupt behavior of RTL8922DE in low power mode is
the same as normal mode, so remove the configuration function for low
power mode.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20250826085152.28164-4-pkshih@realtek.com
This commit is contained in:
Ping-Ke Shih 2025-08-26 16:51:45 +08:00
parent 862132fbfc
commit d6303028ae
3 changed files with 27 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
drivers/net/wireless/realtek/rtw89/pci.c
View File

@ -804,14 +804,16 @@ void rtw89_pci_recognize_intrs_v3(struct rtw89_dev *rtwdev,
isrs->ind_isrs = rtw89_read32(rtwdev, R_BE_PCIE_HISR) & rtwpci->ind_intrs;
isrs->halt_c2h_isrs = isrs->ind_isrs & B_BE_HS0ISR_IND_INT ?
rtw89_read32(rtwdev, R_BE_HISR0) & rtwpci->halt_c2h_intrs : 0;
isrs->isrs[0] = isrs->ind_isrs & B_BE_HCI_AXIDMA_INT ?
rtw89_read32(rtwdev, R_BE_HAXI_HISR00) & rtwpci->intrs[0] : 0;
isrs->isrs[1] = rtw89_read32(rtwdev, R_BE_PCIE_DMA_ISR) & rtwpci->intrs[1];
/* isrs[0] is not used, so borrow to store RDU status to share common
* flow in rtw89_pci_interrupt_threadfn().
*/
isrs->isrs[0] = isrs->isrs[1] & (B_BE_PCIE_RDU_CH1_INT |
B_BE_PCIE_RDU_CH0_INT);
if (isrs->halt_c2h_isrs)
rtw89_write32(rtwdev, R_BE_HISR0, isrs->halt_c2h_isrs);
if (isrs->isrs[0])
rtw89_write32(rtwdev, R_BE_HAXI_HISR00, isrs->isrs[0]);
if (isrs->isrs[1])
rtw89_write32(rtwdev, R_BE_PCIE_DMA_ISR, isrs->isrs[1]);
rtw89_write32(rtwdev, R_BE_PCIE_HISR, isrs->ind_isrs);
@ -868,7 +870,6 @@ EXPORT_SYMBOL(rtw89_pci_disable_intr_v2);
void rtw89_pci_enable_intr_v3(struct rtw89_dev *rtwdev, struct rtw89_pci *rtwpci)
{
rtw89_write32(rtwdev, R_BE_HIMR0, rtwpci->halt_c2h_intrs);
rtw89_write32(rtwdev, R_BE_HAXI_HIMR00, rtwpci->intrs[0]);
rtw89_write32(rtwdev, R_BE_PCIE_DMA_IMR_0_V1, rtwpci->intrs[1]);
rtw89_write32(rtwdev, R_BE_PCIE_HIMR0, rtwpci->ind_intrs);
}
@ -3827,24 +3828,12 @@ static void rtw89_pci_default_intr_mask_v3(struct rtw89_dev *rtwdev)
{
struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv;
rtwpci->ind_intrs = B_BE_HCI_AXIDMA_INT_EN0 |
B_BE_HS0_IND_INT_EN0;
rtwpci->halt_c2h_intrs = B_BE_HALT_C2H_INT_EN | B_BE_WDT_TIMEOUT_INT_EN;
rtwpci->intrs[0] = B_BE_RDU_CH1_INT_EN_V2 |
B_BE_RDU_CH0_INT_EN_V2;
rtwpci->intrs[1] = B_BE_PCIE_RX_RX0P2_IMR0_V1 |
B_BE_PCIE_RX_RPQ0_IMR0_V1;
}
static void rtw89_pci_low_power_intr_mask_v3(struct rtw89_dev *rtwdev)
{
struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv;
rtwpci->ind_intrs = B_BE_HS0_IND_INT_EN0 |
B_BE_HS1_IND_INT_EN0;
rtwpci->ind_intrs = B_BE_HS0_IND_INT_EN0;
rtwpci->halt_c2h_intrs = B_BE_HALT_C2H_INT_EN | B_BE_WDT_TIMEOUT_INT_EN;
rtwpci->intrs[0] = 0;
rtwpci->intrs[1] = B_BE_PCIE_RX_RX0P2_IMR0_V1 |
rtwpci->intrs[1] = B_BE_PCIE_RDU_CH1_IMR |
B_BE_PCIE_RDU_CH0_IMR |
B_BE_PCIE_RX_RX0P2_IMR0_V1 |
B_BE_PCIE_RX_RPQ0_IMR0_V1;
}
@ -3854,8 +3843,6 @@ void rtw89_pci_config_intr_mask_v3(struct rtw89_dev *rtwdev)
if (rtwpci->under_recovery)
rtw89_pci_recovery_intr_mask_v3(rtwdev);
else if (rtwpci->low_power)
rtw89_pci_low_power_intr_mask_v3(rtwdev);
else
rtw89_pci_default_intr_mask_v3(rtwdev);
}

16
drivers/net/wireless/realtek/rtw89/pci.h
View File

@ -372,6 +372,14 @@
#define B_BE_HS0ISR_IND_INT BIT(0)
#define R_BE_PCIE_DMA_IMR_0_V1 0x30B8
#define B_BE_PCIE_RDU_CH7_IMR BIT(31)
#define B_BE_PCIE_RDU_CH6_IMR BIT(30)
#define B_BE_PCIE_RDU_CH5_IMR BIT(29)
#define B_BE_PCIE_RDU_CH4_IMR BIT(28)
#define B_BE_PCIE_RDU_CH3_IMR BIT(27)
#define B_BE_PCIE_RDU_CH2_IMR BIT(26)
#define B_BE_PCIE_RDU_CH1_IMR BIT(25)
#define B_BE_PCIE_RDU_CH0_IMR BIT(24)
#define B_BE_PCIE_RX_RX1P1_IMR0_V1 BIT(23)
#define B_BE_PCIE_RX_RX0P1_IMR0_V1 BIT(22)
#define B_BE_PCIE_RX_ROQ1_IMR0_V1 BIT(21)
@ -397,6 +405,14 @@
#define B_BE_PCIE_TX_CH0_IMR0 BIT(0)
#define R_BE_PCIE_DMA_ISR 0x30BC
#define B_BE_PCIE_RDU_CH7_INT BIT(31)
#define B_BE_PCIE_RDU_CH6_INT BIT(30)
#define B_BE_PCIE_RDU_CH5_INT BIT(29)
#define B_BE_PCIE_RDU_CH4_INT BIT(28)
#define B_BE_PCIE_RDU_CH3_INT BIT(27)
#define B_BE_PCIE_RDU_CH2_INT BIT(26)
#define B_BE_PCIE_RDU_CH1_INT BIT(25)
#define B_BE_PCIE_RDU_CH0_INT BIT(24)
#define B_BE_PCIE_RX_RX1P1_ISR_V1 BIT(23)
#define B_BE_PCIE_RX_RX0P1_ISR_V1 BIT(22)
#define B_BE_PCIE_RX_ROQ1_ISR_V1 BIT(21)

2
drivers/net/wireless/realtek/rtw89/pci_be.c
View File

@ -675,7 +675,7 @@ const struct rtw89_pci_isr_def rtw89_pci_isr_be = {
EXPORT_SYMBOL(rtw89_pci_isr_be);
const struct rtw89_pci_isr_def rtw89_pci_isr_be_v1 = {
.isr_rdu = B_BE_RDU_CH1_INT_V2 | B_BE_RDU_CH0_INT_V2,
.isr_rdu = B_BE_PCIE_RDU_CH1_INT | B_BE_PCIE_RDU_CH0_INT,
.isr_halt_c2h = B_BE_HALT_C2H_INT,
.isr_wdt_timeout = B_BE_WDT_TIMEOUT_INT,
.isr_clear_rpq = {R_BE_PCIE_DMA_ISR, B_BE_PCIE_RX_RPQ0_ISR_V1},