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arm64: dts: qcom: sa8775p: Remove max link speed property for PCIe EP
The maximum link speed was previously restricted to Gen3 due to the absence of Gen4 equalization support in the driver. As Gen4 equalization is already supported by the PCIe controller driver, remove the max-link-speed property. Signed-off-by: Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250617-update_phy-v5-2-2df83ed6a373@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -7711,7 +7711,6 @@ pcie0_ep: pcie-ep@1c00000 {
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power-domains = <&gcc PCIE_0_GDSC>;
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phys = <&pcie0_phy>;
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phy-names = "pciephy";
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max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
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num-lanes = <2>;
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linux,pci-domain = <0>;
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@ -7882,7 +7881,6 @@ pcie1_ep: pcie-ep@1c10000 {
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power-domains = <&gcc PCIE_1_GDSC>;
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phys = <&pcie1_phy>;
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phy-names = "pciephy";
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max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
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num-lanes = <4>;
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linux,pci-domain = <1>;
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