arm64: dts: qcom: sa8775p: Remove max link speed property for PCIe EP

The maximum link speed was previously restricted to Gen3 due to the
absence of Gen4 equalization support in the driver.

As Gen4 equalization is already supported by the PCIe controller
driver, remove the max-link-speed property.

Signed-off-by: Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250617-update_phy-v5-2-2df83ed6a373@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Mrinmay Sarkar 2025-06-17 17:08:20 +05:30 committed by Bjorn Andersson
parent 46952305d2
commit d6111177f6

View File

@ -7711,7 +7711,6 @@ pcie0_ep: pcie-ep@1c00000 {
power-domains = <&gcc PCIE_0_GDSC>;
phys = <&pcie0_phy>;
phy-names = "pciephy";
max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
num-lanes = <2>;
linux,pci-domain = <0>;
@ -7882,7 +7881,6 @@ pcie1_ep: pcie-ep@1c10000 {
power-domains = <&gcc PCIE_1_GDSC>;
phys = <&pcie1_phy>;
phy-names = "pciephy";
max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
num-lanes = <4>;
linux,pci-domain = <1>;