iio: adc: ad7768-1: Add GPIO controller support

The AD7768-1 has the ability to control other local hardware (such as gain
stages),to power down other blocks in the signal chain, or read local
status signals over the SPI interface.

Add direct mode conditional locks in the GPIO callbacks to prevent register
access when the device is in buffered mode.

This change exports the AD7768-1's four GPIOs and makes them accessible
at an upper layer.

Reviewed-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Sergiu Cuciurean <sergiu.cuciurean@analog.com>
Co-developed-by: Jonathan Santos <Jonathan.Santos@analog.com>
Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com>
Link: https://patch.msgid.link/8abca580f43cb31d7088d07a7414b5f7efe91ead.1749569957.git.Jonathan.Santos@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Sergiu Cuciurean 2025-06-11 08:50:56 -03:00 committed by Jonathan Cameron
parent 96b6e814af
commit d569ae0f05

View File

@ -11,6 +11,7 @@
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/gpio/driver.h>
#include <linux/gpio/consumer.h>
#include <linux/interrupt.h>
#include <linux/minmax.h>
@ -88,6 +89,16 @@
#define AD7768_REG_ANALOG2_VCM_MSK GENMASK(2, 0)
#define AD7768_REG_ANALOG2_VCM(x) FIELD_PREP(AD7768_REG_ANALOG2_VCM_MSK, (x))
/* AD7768_REG_GPIO_CONTROL */
#define AD7768_GPIO_UNIVERSAL_EN BIT(7)
#define AD7768_GPIO_CONTROL_MSK GENMASK(3, 0)
/* AD7768_REG_GPIO_WRITE */
#define AD7768_GPIO_WRITE_MSK GENMASK(3, 0)
/* AD7768_REG_GPIO_READ */
#define AD7768_GPIO_READ_MSK GENMASK(3, 0)
#define AD7768_VCM_OFF 0x07
enum ad7768_conv_mode {
@ -177,6 +188,7 @@ struct ad7768_state {
struct gpio_desc *gpio_sync_in;
struct gpio_desc *gpio_reset;
const char *labels[ARRAY_SIZE(ad7768_channels)];
struct gpio_chip gpiochip;
/*
* DMA (thus cache coherency maintenance) may require the
* transfer buffers to live in their own cache lines.
@ -370,6 +382,122 @@ static int ad7768_set_dig_fil(struct ad7768_state *st,
return ad7768_send_sync_pulse(st);
}
static int ad7768_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
{
struct iio_dev *indio_dev = gpiochip_get_data(chip);
struct ad7768_state *st = iio_priv(indio_dev);
int ret;
if (!iio_device_claim_direct(indio_dev))
return -EBUSY;
ret = regmap_clear_bits(st->regmap, AD7768_REG_GPIO_CONTROL,
BIT(offset));
iio_device_release_direct(indio_dev);
return ret;
}
static int ad7768_gpio_direction_output(struct gpio_chip *chip,
unsigned int offset, int value)
{
struct iio_dev *indio_dev = gpiochip_get_data(chip);
struct ad7768_state *st = iio_priv(indio_dev);
int ret;
if (!iio_device_claim_direct(indio_dev))
return -EBUSY;
ret = regmap_set_bits(st->regmap, AD7768_REG_GPIO_CONTROL,
BIT(offset));
iio_device_release_direct(indio_dev);
return ret;
}
static int ad7768_gpio_get(struct gpio_chip *chip, unsigned int offset)
{
struct iio_dev *indio_dev = gpiochip_get_data(chip);
struct ad7768_state *st = iio_priv(indio_dev);
unsigned int val;
int ret;
if (!iio_device_claim_direct(indio_dev))
return -EBUSY;
ret = regmap_read(st->regmap, AD7768_REG_GPIO_CONTROL, &val);
if (ret)
goto err_release;
/*
* If the GPIO is configured as an output, read the current value from
* AD7768_REG_GPIO_WRITE. Otherwise, read the input value from
* AD7768_REG_GPIO_READ.
*/
if (val & BIT(offset))
ret = regmap_read(st->regmap, AD7768_REG_GPIO_WRITE, &val);
else
ret = regmap_read(st->regmap, AD7768_REG_GPIO_READ, &val);
if (ret)
goto err_release;
ret = !!(val & BIT(offset));
err_release:
iio_device_release_direct(indio_dev);
return ret;
}
static int ad7768_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
{
struct iio_dev *indio_dev = gpiochip_get_data(chip);
struct ad7768_state *st = iio_priv(indio_dev);
unsigned int val;
int ret;
if (!iio_device_claim_direct(indio_dev))
return -EBUSY;
ret = regmap_read(st->regmap, AD7768_REG_GPIO_CONTROL, &val);
if (ret)
goto err_release;
if (val & BIT(offset))
ret = regmap_assign_bits(st->regmap, AD7768_REG_GPIO_WRITE,
BIT(offset), value);
err_release:
iio_device_release_direct(indio_dev);
return ret;
}
static int ad7768_gpio_init(struct iio_dev *indio_dev)
{
struct ad7768_state *st = iio_priv(indio_dev);
int ret;
ret = regmap_write(st->regmap, AD7768_REG_GPIO_CONTROL,
AD7768_GPIO_UNIVERSAL_EN);
if (ret)
return ret;
st->gpiochip = (struct gpio_chip) {
.label = "ad7768_1_gpios",
.base = -1,
.ngpio = 4,
.parent = &st->spi->dev,
.can_sleep = true,
.direction_input = ad7768_gpio_direction_input,
.direction_output = ad7768_gpio_direction_output,
.get = ad7768_gpio_get,
.set_rv = ad7768_gpio_set,
.owner = THIS_MODULE,
};
return devm_gpiochip_add_data(&st->spi->dev, &st->gpiochip, indio_dev);
}
static int ad7768_set_freq(struct ad7768_state *st,
unsigned int freq)
{
@ -511,8 +639,9 @@ static const struct iio_info ad7768_info = {
.debugfs_reg_access = &ad7768_reg_access,
};
static int ad7768_setup(struct ad7768_state *st)
static int ad7768_setup(struct iio_dev *indio_dev)
{
struct ad7768_state *st = iio_priv(indio_dev);
int ret;
st->gpio_reset = devm_gpiod_get_optional(&st->spi->dev, "reset",
@ -545,6 +674,13 @@ static int ad7768_setup(struct ad7768_state *st)
if (IS_ERR(st->gpio_sync_in))
return PTR_ERR(st->gpio_sync_in);
/* Only create a Chip GPIO if flagged for it */
if (device_property_read_bool(&st->spi->dev, "gpio-controller")) {
ret = ad7768_gpio_init(indio_dev);
if (ret)
return ret;
}
/* Set the default sampling frequency to 32000 kSPS */
return ad7768_set_freq(st, 32000);
}
@ -885,7 +1021,7 @@ static int ad7768_probe(struct spi_device *spi)
if (ret)
return ret;
ret = ad7768_setup(st);
ret = ad7768_setup(indio_dev);
if (ret < 0) {
dev_err(&spi->dev, "AD7768 setup failed\n");
return ret;