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clk: qcom: clk-alpha-pll: Only configure lucid_evo outputs once

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Which outputs are enabled when PLL_OUTCTRL is asserted only need to be
configured once. When PLL_OUTCTRL is 0 then all the outputs are disabled
anyway. There's no need to enable/disable the individual outputs each
time the PLL is toggled.

Additionally, in some cases PLLs may be enabled from bootloaders without
all the outputs enabled that we intend to use. In which case we still
need to enable the required outputs during initial configuration even if
the PLL is already on. Enabling additional outputs when the PLL is
already running is safe.

Change-Id: Iffa471783ed5021a92f31673fb2e7539741973b9
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
This commit is contained in:
Mike Tipton 2022-08-31 11:57:52 -07:00
parent b6488fc692
commit d5419b1de9
1 changed files with 5 additions and 11 deletions
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16
drivers/clk/qcom/clk-alpha-pll.c
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@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2015, 2018-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2021, Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/kernel.h>
@ -3009,6 +3009,10 @@ int clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll,
{
int ret;
ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);
if (ret)
return ret;
ret = trion_pll_is_enabled(pll, regmap);
if (ret)
return ret;
@ -3130,11 +3134,6 @@ static int alpha_pll_lucid_evo_enable(struct clk_hw *hw)
if (ret)
return ret;
/* Enable the PLL outputs */
ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);
if (ret)
return ret;
/* Enable the global PLL outputs */
ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);
if (ret)
@ -3167,11 +3166,6 @@ static void alpha_pll_lucid_evo_disable(struct clk_hw *hw)
if (ret)
return;
/* Disable the PLL outputs */
ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);
if (ret)
return;
/* Place the PLL mode in STANDBY */
regmap_write(pll->clkr.regmap, PLL_OPMODE(pll),
PLL_STANDBY);