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dt-bindings: mmc: add binding for BST DWCMSHC SDHCI controller
Add device tree bindings for the Black Sesame Technologies DWCMSHC SDHCI controller used in C1200 SoC. The binding describes a Synopsys DesignWare Cores Mobile Storage Host Controller with BST-specific extensions including: - Two register regions (core SDHCI and CRM registers) - Optional memory-region for bounce buffer support - Fixed clock input Signed-off-by: Ge Gordon <gordon.ge@bst.ai> Signed-off-by: Albert Yang <yangzh0906@thundersoft.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Documentation/devicetree/bindings/mmc/bst,c1200-sdhci.yaml
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70
Documentation/devicetree/bindings/mmc/bst,c1200-sdhci.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mmc/bst,c1200-sdhci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Black Sesame Technologies DWCMSHC SDHCI Controller
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maintainers:
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- Ge Gordon <gordon.ge@bst.ai>
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allOf:
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- $ref: sdhci-common.yaml#
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properties:
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compatible:
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const: bst,c1200-sdhci
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reg:
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items:
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- description: Core SDHCI registers
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- description: CRM registers
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: core
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memory-region:
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maxItems: 1
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dma-coherent: true
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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mmc@22200000 {
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compatible = "bst,c1200-sdhci";
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reg = <0x0 0x22200000 0x0 0x1000>,
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<0x0 0x23006000 0x0 0x1000>;
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interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_mmc>;
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clock-names = "core";
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memory-region = <&mmc0_reserved>;
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max-frequency = <200000000>;
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bus-width = <8>;
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non-removable;
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dma-coherent;
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};
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};
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