iommu/arm-smmu-v3-iommufd: Report CFGI/TLBI-repeat erratum

A guest with access to VCMDQ generates its own invalidation commands
and must apply any invalidation errata before submitting them. If the
host also repeats those commands, each affected invalidation is issued
four times instead of twice.

Add IOMMU_HW_INFO_ARM_SMMUV3_ERRATA_REPEAT_TLBI_CFGI to report the
CFGI/TLBI-repeat erratum to user space. This allows the VMM to expose
the erratum to the guest or apply the workaround itself.

Use the raw __arm_smmu_cmdq_issue_cmdlist() helper for user-provided
invalidations so the host does not apply the workaround a second time.
Add arm_smmu_erratum_repeat_tlbi_cfgi() to query the static key when
populating the SMMUv3 hardware information.

Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
Ashish Mhetre 2026-07-26 08:19:03 +00:00 committed by Will Deacon
parent 95ed2da202
commit d501d66815
4 changed files with 24 additions and 4 deletions

View File

@ -33,6 +33,9 @@ void *arm_smmu_hw_info(struct device *dev, u32 *length,
info->iidr = readl_relaxed(master->smmu->base + ARM_SMMU_IIDR);
info->aidr = readl_relaxed(master->smmu->base + ARM_SMMU_AIDR);
if (arm_smmu_erratum_repeat_tlbi_cfgi())
info->flags |= IOMMU_HW_INFO_ARM_SMMUV3_ERRATA_REPEAT_TLBI_CFGI;
*length = sizeof(*info);
*type = IOMMU_HW_INFO_TYPE_ARM_SMMUV3;
@ -386,8 +389,8 @@ int arm_vsmmu_cache_invalidate(struct iommufd_viommu *viommu,
continue;
/* FIXME always uses the main cmdq rather than trying to group by type */
ret = arm_smmu_cmdq_issue_cmdlist(smmu, &smmu->cmdq, &last->cmd,
cur - last, true);
ret = __arm_smmu_cmdq_issue_cmdlist(smmu, &smmu->cmdq, &last->cmd,
cur - last, true);
if (ret) {
cur--;
goto out;

View File

@ -829,11 +829,16 @@ int __arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
return ret;
}
bool arm_smmu_erratum_repeat_tlbi_cfgi(void)
{
return static_branch_unlikely(&arm_smmu_erratum_repeat_tlbi_cfgi_key);
}
static bool arm_smmu_erratum_cmd_needs_repeating(struct arm_smmu_cmd *cmd)
{
u8 opcode;
if (!static_branch_unlikely(&arm_smmu_erratum_repeat_tlbi_cfgi_key))
if (!arm_smmu_erratum_repeat_tlbi_cfgi())
return false;
opcode = FIELD_GET(CMDQ_0_OP, cmd->data[0]);

View File

@ -1216,6 +1216,7 @@ int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu,
struct arm_smmu_cmdq *cmdq,
struct arm_smmu_cmd *cmds, int n,
bool sync);
bool arm_smmu_erratum_repeat_tlbi_cfgi(void);
#ifdef CONFIG_ARM_SMMU_V3_SVA
bool arm_smmu_sva_supported(struct arm_smmu_device *smmu);

View File

@ -574,11 +574,22 @@ struct iommu_hw_info_vtd {
__aligned_u64 ecap_reg;
};
/**
* enum iommu_hw_info_arm_smmuv3_flags - Flags for ARM SMMUv3 hw_info
* @IOMMU_HW_INFO_ARM_SMMUV3_ERRATA_REPEAT_TLBI_CFGI:
* If set, user space must issue TLBI/CFGI+SYNC commands twice due to
* hardware erratum T264-SMMU-3. See the description at
* arm_smmu_erratum_repeat_tlbi_cfgi_key.
*/
enum iommu_hw_info_arm_smmuv3_flags {
IOMMU_HW_INFO_ARM_SMMUV3_ERRATA_REPEAT_TLBI_CFGI = 1 << 0,
};
/**
* struct iommu_hw_info_arm_smmuv3 - ARM SMMUv3 hardware information
* (IOMMU_HW_INFO_TYPE_ARM_SMMUV3)
*
* @flags: Must be set to 0
* @flags: Combination of enum iommu_hw_info_arm_smmuv3_flags
* @__reserved: Must be 0
* @idr: Implemented features for ARM SMMU Non-secure programming interface
* @iidr: Information about the implementation and implementer of ARM SMMU,