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clk: qcom: gcc-mdm9607: Drop redundant register update during probe
GPLL0 is pretty much guaranteed to be already on (and voted) during boot, since it's used by the CPU and also various other components such as UART. We also vote for this bit in the actual GPLL0 definition, which will be set as soon as any driver in the kernel requires using the GPLL0 clock. All in all, this makes separately voting for GPLL0 during probe redundant, especially because the "acpuclock" in the comment is a downstream construct that does not exist in upstream. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20260706-qcom-clk-mdm9607-fixes-v2-12-745565101869@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -1425,16 +1425,7 @@ MODULE_DEVICE_TABLE(of, gcc_mdm9607_match_table);
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static int gcc_mdm9607_probe(struct platform_device *pdev)
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{
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struct regmap *regmap;
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regmap = qcom_cc_map(pdev, &gcc_mdm9607_desc);
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if (IS_ERR(regmap))
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return PTR_ERR(regmap);
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/* Vote for GPLL0 to turn on. Needed by acpuclock. */
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regmap_update_bits(regmap, 0x45000, BIT(0), BIT(0));
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return qcom_cc_really_probe(&pdev->dev, &gcc_mdm9607_desc, regmap);
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return qcom_cc_probe(pdev, &gcc_mdm9607_desc);
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}
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static struct platform_driver gcc_mdm9607_driver = {
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