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dt-bindings: pinctrl: add bindings for MT7981 SoC
Add bindings for the MT7981 pinctrl driver. As MT7981 has most features in common with MT7986 (but has a different layout in terms on pinctrl and clocks), the existing mediatek,mt7986-pinctrl.yaml was used as an example to create a similar document covering MT7981. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/3f0fd0becc338eef66caeb7244c3c432b8d1ef7a.1674693008.git.daniel@makrotopia.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Daniel Golle
Linus Walleij
parent
9421655de8
commit
d4059de433
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@ -0,0 +1,475 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7981-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek MT7981 Pin Controller
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maintainers:
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- Daniel Golle <daniel@makrotopia.org>
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description:
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The MediaTek's MT7981 Pin controller is used to control SoC pins.
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properties:
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compatible:
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enum:
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- mediatek,mt7981-pinctrl
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reg:
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minItems: 9
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maxItems: 9
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reg-names:
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items:
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- const: gpio
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- const: iocfg_rt
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- const: iocfg_rm
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- const: iocfg_rb
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- const: iocfg_lb
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- const: iocfg_bl
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- const: iocfg_tm
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- const: iocfg_tl
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- const: eint
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gpio-controller: true
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"#gpio-cells":
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const: 2
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description: >
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Number of cells in GPIO specifier. Since the generic GPIO binding is used,
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the amount of cells must be specified as 2. See the below mentioned gpio
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binding representation for description of particular cells.
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gpio-ranges:
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minItems: 1
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maxItems: 5
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description: GPIO valid number range.
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interrupt-controller: true
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interrupts:
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maxItems: 1
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"#interrupt-cells":
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const: 2
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allOf:
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- $ref: pinctrl.yaml#
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required:
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- compatible
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- reg
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- reg-names
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- gpio-controller
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- "#gpio-cells"
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patternProperties:
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'-pins$':
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type: object
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additionalProperties: false
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patternProperties:
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'^.*mux.*$':
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type: object
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additionalProperties: false
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description: |
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pinmux configuration nodes.
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The following table shows the effective values of "group", "function"
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properties and chip pinout pins
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groups function pins (in pin#)
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---------------------------------------------------------------------
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"wa_aice1" "wa_aice" 0, 1
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"wa_aice2" "wa_aice" 0, 1
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"wm_uart_0" "uart" 0, 1
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"dfd" "dfd" 0, 1, 4, 5
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"watchdog" "watchdog" 2
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"pcie_pereset" "pcie" 3
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"jtag" "jtag" 4, 5, 6, 7, 8
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"wm_jtag_0" "jtag" 4, 5, 6, 7, 8
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"wo0_jtag_0" "jtag" 9, 10, 11, 12, 13
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"uart2_0" "uart" 4, 5, 6, 7
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"gbe_led0" "led" 8
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"pta_ext_0" "pta" 4, 5, 6
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"pwm2" "pwm" 7
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"net_wo0_uart_txd_0" "uart" 8
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"spi1_0" "spi" 4, 5, 6, 7
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"i2c0_0" "i2c" 6, 7
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"dfd_ntrst" "dfd" 8
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"wm_aice1" "wa_aice" 9, 10
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"pwm0_0" "pwm" 13
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"pwm0_1" "pwm" 15
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"pwm1_0" "pwm" 14
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"pwm1_1" "pwm" 15
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"net_wo0_uart_txd_1" "uart" 14
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"net_wo0_uart_txd_2" "uart" 15
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"gbe_led1" "led" 13
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"pcm" "pcm" 9, 10, 11, 12, 13, 25
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"watchdog1" "watchdog" 13
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"udi" "udi" 9, 10, 11, 12, 13
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"drv_vbus" "usb" 14
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"emmc_45" "flash" 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25
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"snfi" "flash" 16, 17, 18, 19, 20, 21
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"spi0" "spi" 16, 17, 18, 19
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"spi0_wp_hold" "spi" 20, 21
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"spi1_1" "spi" 22, 23, 24, 25
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"spi2" "spi" 26, 27, 28, 29
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"spi2_wp_hold" "spi" 30, 31
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"uart1_0" "uart" 16, 17, 18, 19
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"uart1_1" "uart" 26, 27, 28, 29
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"uart2_1" "uart" 22, 23, 24, 25
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"pta_ext_1" "pta" 22, 23, 24
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"wm_aurt_1" "uart" 20, 21
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"wm_aurt_2" "uart" 30, 31
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"wm_jtag_1" "jtag" 20, 21, 22, 23, 24
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"wo0_jtag_1" "jtag" 25, 26, 27, 28, 29
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"wa_aice3" "wa_aice" 28, 20
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"wm_aice2" "wa_aice" 30, 31
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"i2c0_1" "i2c" 30, 31
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"u2_phy_i2c" "i2c" 30, 31
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"uart0" "uart" 32, 33
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"sgmii1_phy_i2c" "i2c" 32, 33
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"u3_phy_i2c" "i2c" 32, 33
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"sgmii0_phy_i2c" "i2c" 32, 33
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"pcie_clk" "pcie" 34
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"pcie_wake" "pcie" 35
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"i2c0_2" "i2c" 36, 37
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"smi_mdc_mdio" "eth" 36, 37
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"gbe_ext_mdc_mdio" "eth" 36, 37
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"wf0_mode1" "eth" 40, 41, 42, 43, 44, 45, 46, 47, 48,
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49, 50, 51, 52, 53, 54, 55, 56
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"wf0_mode3" "eth" 45, 46, 47, 48, 49, 51
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"wf2g_led0" "led" 30
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"wf2g_led1" "led" 34
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"wf5g_led0" "led" 31
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"wf5g_led1" "led" 35
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"mt7531_int" "eth" 38
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"ant_sel" "ant" 14, 15, 16, 17, 18, 19, 20, 21, 22
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23, 24, 25, 34, 35
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$ref: /schemas/pinctrl/pinmux-node.yaml
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properties:
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function:
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description:
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A string containing the name of the function to mux to the group.
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enum: [wa_aice, dfd, jtag, pta, pcm, udi, usb, ant, eth, i2c, led,
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pwm, spi, uart, watchdog, flash, pcie]
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groups:
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description:
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An array of strings. Each string contains the name of a group.
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required:
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- function
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- groups
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allOf:
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- if:
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properties:
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function:
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const: wa_aice
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then:
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properties:
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groups:
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enum: [wa_aice1, wa_aice2, wm_aice1_1, wa_aice3, wm_aice1_2]
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- if:
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properties:
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function:
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const: dfd
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then:
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properties:
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groups:
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enum: [dfd, dfd_ntrst]
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- if:
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properties:
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function:
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const: jtag
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then:
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properties:
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groups:
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enum: [jtag, wm_jtag_0, wo0_jtag_0, wo0_jtag_1, wm_jtag_1]
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- if:
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properties:
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function:
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const: pta
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then:
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properties:
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groups:
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enum: [pta_ext_0, pta_ext_1]
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- if:
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properties:
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function:
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const: pcm
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then:
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properties:
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groups:
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enum: [pcm]
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- if:
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properties:
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function:
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const: udi
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then:
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properties:
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groups:
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enum: [udi]
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- if:
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properties:
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function:
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const: usb
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then:
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properties:
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groups:
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enum: [drv_vbus]
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- if:
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properties:
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function:
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const: ant
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then:
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properties:
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groups:
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enum: [ant_sel]
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- if:
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properties:
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function:
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const: eth
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then:
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properties:
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groups:
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enum: [smi_mdc_mdio, gbe_ext_mdc_mdio, wf0_mode1, wf0_mode3,
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mt7531_int]
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- if:
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properties:
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function:
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const: i2c
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then:
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properties:
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groups:
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enum: [i2c0_0, i2c0_1, u2_phy_i2c, sgmii1_phy_i2c, u3_phy_i2c,
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sgmii0_phy_i2c, i2c0_2]
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- if:
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properties:
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function:
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const: led
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then:
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properties:
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groups:
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enum: [gbe_led0, gbe_led1, wf2g_led0, wf2g_led1, wf5g_led0, wf5g_led1]
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- if:
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properties:
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function:
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const: pwm
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then:
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properties:
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groups:
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items:
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enum: [pwm2, pwm0_0, pwm0_1, pwm1_0, pwm1_1]
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maxItems: 3
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- if:
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properties:
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function:
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const: spi
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then:
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properties:
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groups:
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items:
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enum: [spi1_0, spi0, spi0_wp_hold, spi1_1, spi2, spi2_wp_hold]
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maxItems: 4
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- if:
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properties:
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function:
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const: uart
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then:
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properties:
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groups:
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items:
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enum: [wm_uart_0, uart2_0, net_wo0_uart_txd_0,
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net_wo0_uart_txd_1, net_wo0_uart_txd_2, uart1_0,
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uart1_1, uart2_1, wm_aurt_1, wm_aurt_2, uart0]
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- if:
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properties:
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function:
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const: watchdog
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then:
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properties:
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groups:
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enum: [watchdog]
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- if:
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properties:
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function:
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const: flash
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then:
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properties:
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groups:
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items:
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enum: [emmc_45, snfi]
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maxItems: 1
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- if:
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properties:
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function:
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const: pcie
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then:
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properties:
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groups:
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items:
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enum: [pcie_clk, pcie_wake, pcie_pereset]
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maxItems: 3
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'^.*conf.*$':
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type: object
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additionalProperties: false
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description: pinconf configuration nodes.
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$ref: /schemas/pinctrl/pincfg-node.yaml
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properties:
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pins:
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description:
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An array of strings. Each string contains the name of a pin.
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items:
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enum: [GPIO_WPS, GPIO_RESET, SYS_WATCHDOG, PCIE_PERESET_N,
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JTAG_JTDO, JTAG_JTDI, JTAG_JTMS, JTAG_JTCLK, JTAG_JTRST_N,
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WO_JTAG_JTDO, WO_JTAG_JTDI, WO_JTAG_JTMS, WO_JTAG_JTCLK,
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WO_JTAG_JTRST_N, USB_VBUS, PWM0, SPI0_CLK, SPI0_MOSI,
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SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI,
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SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS,
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SPI2_HOLD, SPI2_WP, UART0_RXD, UART0_TXD, PCIE_CLK_REQ,
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PCIE_WAKE_N, SMI_MDC, SMI_MDIO, GBE_INT, GBE_RESET,
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WF_DIG_RESETB, WF_CBA_RESETB, WF_XO_REQ, WF_TOP_CLK,
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WF_TOP_DATA, WF_HB1, WF_HB2, WF_HB3, WF_HB4, WF_HB0,
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WF_HB0_B, WF_HB5, WF_HB6, WF_HB7, WF_HB8, WF_HB9, WF_HB10]
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maxItems: 57
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bias-disable: true
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bias-pull-up:
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oneOf:
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- type: boolean
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description: normal pull up.
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- enum: [100, 101, 102, 103]
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description: >
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PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
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dt-bindings/pinctrl/mt65xx.h.
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bias-pull-down:
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oneOf:
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- type: boolean
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description: normal pull down.
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- enum: [100, 101, 102, 103]
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description: >
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PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
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dt-bindings/pinctrl/mt65xx.h.
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input-enable: true
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input-disable: true
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output-enable: true
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output-low: true
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output-high: true
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input-schmitt-enable: true
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input-schmitt-disable: true
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drive-strength:
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enum: [2, 4, 6, 8, 10, 12, 14, 16]
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mediatek,pull-up-adv:
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description: |
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Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
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||||
Pull up setings for 2 pull resistors, R0 and R1. Valid arguments
|
||||
are described as below:
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0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
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||||
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
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2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
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3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
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||||
$ref: /schemas/types.yaml#/definitions/uint32
|
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enum: [0, 1, 2, 3]
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||||
mediatek,pull-down-adv:
|
||||
description: |
|
||||
Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
|
||||
Pull down setings for 2 pull resistors, R0 and R1. Valid arguments
|
||||
are described as below:
|
||||
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
|
||||
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
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||||
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
|
||||
3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
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||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [0, 1, 2, 3]
|
||||
|
||||
required:
|
||||
- pins
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
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#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/mt65xx.h>
|
||||
|
||||
soc {
|
||||
#address-cells = <2>;
|
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#size-cells = <2>;
|
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pio: pinctrl@11d00000 {
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compatible = "mediatek,mt7981-pinctrl";
|
||||
reg = <0 0x11d00000 0 0x1000>,
|
||||
<0 0x11c00000 0 0x1000>,
|
||||
<0 0x11c10000 0 0x1000>,
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||||
<0 0x11d20000 0 0x1000>,
|
||||
<0 0x11e00000 0 0x1000>,
|
||||
<0 0x11e20000 0 0x1000>,
|
||||
<0 0x11f00000 0 0x1000>,
|
||||
<0 0x11f10000 0 0x1000>,
|
||||
<0 0x1000b000 0 0x1000>;
|
||||
reg-names = "gpio", "iocfg_rt", "iocfg_rm",
|
||||
"iocfg_rb", "iocfg_lb", "iocfg_bl",
|
||||
"iocfg_tm", "iocfg_tl", "eint";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pio 0 0 56>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
mdio_pins: mdio-pins {
|
||||
mux {
|
||||
function = "eth";
|
||||
groups = "smi_mdc_mdio";
|
||||
};
|
||||
};
|
||||
|
||||
spi0_flash_pins: spi0-pins {
|
||||
mux {
|
||||
function = "spi";
|
||||
groups = "spi0", "spi0_wp_hold";
|
||||
};
|
||||
|
||||
conf-pu {
|
||||
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
|
||||
drive-strength = <MTK_DRIVE_8mA>;
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
|
||||
};
|
||||
|
||||
conf-pd {
|
||||
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
|
||||
drive-strength = <MTK_DRIVE_8mA>;
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie_pins: pcie-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie_clk", "pcie_wake", "pcie_pereset";
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user