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arm64: dts: qcom: msm8996: drop source clock entries from the UFS node
There is no need to mention and/or to touch in any way the intermediate (source) clocks. Drop them from MSM8996 UFSHCD schema, making it follow the example lead by all other platforms. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240408-msm8996-fix-ufs-v4-4-ee1a28bf8579@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -2079,24 +2079,20 @@ ufshc: ufshc@624000 {
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power-domains = <&gcc UFS_GDSC>;
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clock-names =
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"core_clk_src",
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"core_clk",
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"bus_clk",
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"bus_aggr_clk",
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"iface_clk",
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"core_clk_unipro_src",
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"core_clk_unipro",
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"core_clk_ice",
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"ref_clk",
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"tx_lane0_sync_clk",
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"rx_lane0_sync_clk";
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clocks =
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<&gcc UFS_AXI_CLK_SRC>,
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<&gcc GCC_UFS_AXI_CLK>,
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<&gcc GCC_SYS_NOC_UFS_AXI_CLK>,
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<&gcc GCC_AGGRE2_UFS_AXI_CLK>,
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<&gcc GCC_UFS_AHB_CLK>,
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<&gcc UFS_ICE_CORE_CLK_SRC>,
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<&gcc GCC_UFS_UNIPRO_CORE_CLK>,
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<&gcc GCC_UFS_ICE_CORE_CLK>,
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<&rpmcc RPM_SMD_LN_BB_CLK>,
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@ -2104,8 +2100,6 @@ ufshc: ufshc@624000 {
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<&gcc GCC_UFS_RX_SYMBOL_0_CLK>;
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freq-table-hz =
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<100000000 200000000>,
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<100000000 200000000>,
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<0 0>,
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<0 0>,
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<0 0>,
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<0 0>,
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