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cgroup/cpuset: Fix incorrect effective_cpus bug in update_cpumasks_hier()

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With the introduction of cpuset.cpus.exclusive, the computation of
effective_cpus differs depending on if a cpuset is a valid partition
root or not.

In update_cpumasks_hier(), effective_cpus is computed early
to check if the current subtree can be skipped. Later on
update_parent_effective_cpumask() may be called which can change the
partition state from valid to invalid or vice versa. If the partition
state changes, the previously computed effective_cpus may no longer be
valid. Fix that by recomputing effective_cpus again when that happens.

Also add a new test case into test_cpuset_prs.sh to verify this change.

Fixes: e2ffe502ba ("cgroup/cpuset: Add cpuset.cpus.exclusive for v2")
Signed-off-by: Waiman Long <longman@redhat.com>
Reviewed-by: Guopeng Zhang <zhangguopeng@kylinos.cn>
Signed-off-by: Tejun Heo <tj@kernel.org>
This commit is contained in:
Waiman Long 2026-10-25 17:44:41 -04:00 committed by Tejun Heo
parent 69a75e4f37
commit d3873b45be
2 changed files with 11 additions and 2 deletions
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10
kernel/cgroup/cpuset.c
View File

@ -2327,10 +2327,16 @@ static void update_cpumasks_hier(struct cpuset *cs, struct tmpmasks *tmp,
if (update_parent) {
update_parent_effective_cpumask(cp, partcmd_update, NULL, tmp);
/*
* The cpuset partition_root_state may become
* invalid. Capture it.
* Capture current partition_root_state as it may have
* changed. Recompute effective cpumask if changed.
*/
new_prs = cp->partition_root_state;
if (new_prs != old_prs) {
if (new_prs > 0)
compute_partition_effective_cpumask(cp, tmp->new_cpus);
else
compute_effective_cpumask(tmp->new_cpus, cp, parent);
}
}
spin_lock_irq(&callback_lock);

3
tools/testing/selftests/cgroup/test_cpuset_prs.sh
View File

@ -364,6 +364,9 @@ TEST_MATRIX=(
" C1-4:X2-4 C2-4:X3-4:P1 C3-4:X4:P2 \
. . X5 . . 0 A1:1-4|A2:2-4|A3:3-4 \
A1:P0|A2:P-1|A3:P-2 ."
" C1-5:X3-5:P2 C3-5:X4-5:P2 C4-5:X5:P2 \
. X1-4 . . . 0 A1:1-3|A2:4|A3:4 \
A1:P2|A2:P2|A3:P-2 1-4"
" C1-4:X2-4 C1-4:X3-4:P1 C3-4:X4:P2 \
. . . X1 . 0 A1:1-2|A2:3-4|A3:3-4 \
A1:P0|A2:P1|A3:P-2 ."