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iio: dac: ad3530r: Refactor setup to table-driven register banks

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Devices with a multi-bank register map repeat the same configuration
across several banks, which the hardcoded register addresses in
ad3530r_setup() cannot cover.

Move the addresses into per-chip arrays and add ad3530r_set_reg_bank_bits()
and ad3530r_write_reg_banks() to apply an operation to every bank. Each
current device has a single bank, so no functional change.

Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Kim Seer Paller 2026-07-03 18:10:09 +08:00 committed by Jonathan Cameron
parent f1d92ca09f
commit d373ecd234
1 changed files with 97 additions and 16 deletions
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113
drivers/iio/dac/ad3530r.c
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@ -70,7 +70,13 @@ struct ad3530r_chip_info {
const struct iio_chan_spec *channels;
int (*input_ch_reg)(unsigned int channel);
int (*sw_ldac_trig_reg)(unsigned int channel);
const unsigned int *interface_config_a;
const unsigned int *output_control;
const unsigned int *reference_control;
const unsigned int *op_mode;
unsigned int num_channels;
unsigned int num_banks;
unsigned int num_op_mode_regs;
bool internal_ref_support;
};
@ -341,12 +347,39 @@ static const struct iio_chan_spec ad3531r_channels[] = {
AD3530R_CHAN(3, ad3531r_ext_info),
};
static const unsigned int ad3530r_if_config[] = {
AD3530R_INTERFACE_CONFIG_A,
};
static const unsigned int ad3530r_out_ctrl[] = {
AD3530R_OUTPUT_CONTROL_0,
};
static const unsigned int ad3530r_ref_ctrl[] = {
AD3530R_REFERENCE_CONTROL_0,
};
static const unsigned int ad3530r_op_mode[] = {
AD3530R_OUTPUT_OPERATING_MODE_0,
AD3530R_OUTPUT_OPERATING_MODE_1,
};
static const unsigned int ad3531r_op_mode[] = {
AD3530R_OUTPUT_OPERATING_MODE_0,
};
static const struct ad3530r_chip_info ad3530_chip = {
.name = "ad3530",
.channels = ad3530r_channels,
.num_channels = ARRAY_SIZE(ad3530r_channels),
.sw_ldac_trig_reg = ad3530r_trigger_sw_ldac_reg,
.input_ch_reg = ad3530r_input_ch_reg,
.interface_config_a = ad3530r_if_config,
.output_control = ad3530r_out_ctrl,
.reference_control = ad3530r_ref_ctrl,
.op_mode = ad3530r_op_mode,
.num_banks = ARRAY_SIZE(ad3530r_if_config),
.num_op_mode_regs = ARRAY_SIZE(ad3530r_op_mode),
.internal_ref_support = false,
};
@ -356,6 +389,12 @@ static const struct ad3530r_chip_info ad3530r_chip = {
.num_channels = ARRAY_SIZE(ad3530r_channels),
.sw_ldac_trig_reg = ad3530r_trigger_sw_ldac_reg,
.input_ch_reg = ad3530r_input_ch_reg,
.interface_config_a = ad3530r_if_config,
.output_control = ad3530r_out_ctrl,
.reference_control = ad3530r_ref_ctrl,
.op_mode = ad3530r_op_mode,
.num_banks = ARRAY_SIZE(ad3530r_if_config),
.num_op_mode_regs = ARRAY_SIZE(ad3530r_op_mode),
.internal_ref_support = true,
};
@ -365,6 +404,12 @@ static const struct ad3530r_chip_info ad3531_chip = {
.num_channels = ARRAY_SIZE(ad3531r_channels),
.sw_ldac_trig_reg = ad3531r_trigger_sw_ldac_reg,
.input_ch_reg = ad3531r_input_ch_reg,
.interface_config_a = ad3530r_if_config,
.output_control = ad3530r_out_ctrl,
.reference_control = ad3530r_ref_ctrl,
.op_mode = ad3531r_op_mode,
.num_banks = ARRAY_SIZE(ad3530r_if_config),
.num_op_mode_regs = ARRAY_SIZE(ad3531r_op_mode),
.internal_ref_support = false,
};
@ -374,15 +419,54 @@ static const struct ad3530r_chip_info ad3531r_chip = {
.num_channels = ARRAY_SIZE(ad3531r_channels),
.sw_ldac_trig_reg = ad3531r_trigger_sw_ldac_reg,
.input_ch_reg = ad3531r_input_ch_reg,
.interface_config_a = ad3530r_if_config,
.output_control = ad3530r_out_ctrl,
.reference_control = ad3530r_ref_ctrl,
.op_mode = ad3531r_op_mode,
.num_banks = ARRAY_SIZE(ad3530r_if_config),
.num_op_mode_regs = ARRAY_SIZE(ad3531r_op_mode),
.internal_ref_support = true,
};
static int ad3530r_set_reg_bank_bits(const struct ad3530r_state *st,
const unsigned int *regs,
unsigned int num_regs,
unsigned int mask)
{
int ret;
for (unsigned int i = 0; i < num_regs; i++) {
ret = regmap_set_bits(st->regmap, regs[i], mask);
if (ret)
return ret;
}
return 0;
}
static int ad3530r_write_reg_banks(const struct ad3530r_state *st,
const unsigned int *regs,
unsigned int num_regs,
unsigned int val)
{
int ret;
for (unsigned int i = 0; i < num_regs; i++) {
ret = regmap_write(st->regmap, regs[i], val);
if (ret)
return ret;
}
return 0;
}
static int ad3530r_setup(struct ad3530r_state *st, int external_vref_uV)
{
const struct ad3530r_chip_info *chip_info = st->chip_info;
struct device *dev = regmap_get_device(st->regmap);
struct gpio_desc *reset_gpio;
int i, ret;
u8 range_multiplier, val;
int ret;
reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
if (IS_ERR(reset_gpio))
@ -395,8 +479,9 @@ static int ad3530r_setup(struct ad3530r_state *st, int external_vref_uV)
gpiod_set_value_cansleep(reset_gpio, 0);
} else {
/* Perform software reset */
ret = regmap_update_bits(st->regmap, AD3530R_INTERFACE_CONFIG_A,
AD3530R_SW_RESET, AD3530R_SW_RESET);
ret = ad3530r_set_reg_bank_bits(st, chip_info->interface_config_a,
chip_info->num_banks,
AD3530R_SW_RESET);
if (ret)
return ret;
}
@ -405,8 +490,9 @@ static int ad3530r_setup(struct ad3530r_state *st, int external_vref_uV)
range_multiplier = 1;
if (device_property_read_bool(dev, "adi,range-double")) {
ret = regmap_set_bits(st->regmap, AD3530R_OUTPUT_CONTROL_0,
AD3530R_OUTPUT_CONTROL_RANGE);
ret = ad3530r_set_reg_bank_bits(st, chip_info->output_control,
chip_info->num_banks,
AD3530R_OUTPUT_CONTROL_RANGE);
if (ret)
return ret;
@ -416,8 +502,9 @@ static int ad3530r_setup(struct ad3530r_state *st, int external_vref_uV)
if (external_vref_uV) {
st->vref_mV = range_multiplier * external_vref_uV / MILLI;
} else {
ret = regmap_set_bits(st->regmap, AD3530R_REFERENCE_CONTROL_0,
AD3530R_REFERENCE_CONTROL_SEL);
ret = ad3530r_set_reg_bank_bits(st, chip_info->reference_control,
chip_info->num_banks,
AD3530R_REFERENCE_CONTROL_SEL);
if (ret)
return ret;
@ -430,18 +517,12 @@ static int ad3530r_setup(struct ad3530r_state *st, int external_vref_uV)
FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(2), AD3530R_NORMAL_OP) |
FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(3), AD3530R_NORMAL_OP);
ret = regmap_write(st->regmap, AD3530R_OUTPUT_OPERATING_MODE_0, val);
ret = ad3530r_write_reg_banks(st, st->chip_info->op_mode,
st->chip_info->num_op_mode_regs, val);
if (ret)
return ret;
if (st->chip_info->num_channels > 4) {
ret = regmap_write(st->regmap, AD3530R_OUTPUT_OPERATING_MODE_1,
val);
if (ret)
return ret;
}
for (i = 0; i < st->chip_info->num_channels; i++)
for (unsigned int i = 0; i < st->chip_info->num_channels; i++)
st->chan[i].powerdown_mode = AD3530R_POWERDOWN_32K;
st->ldac_gpio = devm_gpiod_get_optional(dev, "ldac", GPIOD_OUT_LOW);