perf vendor events riscv: Rename U74 to Bullet

This set of PMU event descriptions applies not only to the SiFive U74
core configuration, but also to other SiFive cores that implement the
Bullet microarchitecture (such as U64, P270, and X280). Rename the
directory to be more generic.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Tested-by: Ian Rogers <irogers@google.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20250213220341.3215660-2-samuel.holland@sifive.com
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
This commit is contained in:
Samuel Holland 2025-02-12 17:21:34 -08:00 committed by Namhyung Kim
parent c1a37db3cf
commit d35ad7e881
5 changed files with 1 additions and 1 deletions

View File

@ -14,7 +14,7 @@
#
#
#MVENDORID-MARCHID-MIMPID,Version,Filename,EventType
0x489-0x8000000000000007-0x[[:xdigit:]]+,v1,sifive/u74,core
0x489-0x8000000000000007-0x[[:xdigit:]]+,v1,sifive/bullet,core
0x5b7-0x0-0x0,v1,thead/c900-legacy,core
0x67e-0x80000000db0000[89]0-0x[[:xdigit:]]+,v1,starfive/dubhe-80,core
0x31e-0x8000000000008a45-0x[[:xdigit:]]+,v1,andes/ax45,core

1 # Format:
14 #
15 #
16 #MVENDORID-MARCHID-MIMPID,Version,Filename,EventType
17 0x489-0x8000000000000007-0x[[:xdigit:]]+,v1,sifive/u74,core 0x489-0x8000000000000007-0x[[:xdigit:]]+,v1,sifive/bullet,core
18 0x5b7-0x0-0x0,v1,thead/c900-legacy,core
19 0x67e-0x80000000db0000[89]0-0x[[:xdigit:]]+,v1,starfive/dubhe-80,core
20 0x31e-0x8000000000008a45-0x[[:xdigit:]]+,v1,andes/ax45,core