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drm/i915: Add skl_wm_plane_disable_noatomic()
Add skl_wm_plane_disable_noatomic() which will clear out all the ddb and wm state for the plane. And let's do this _before_ we call plane->disable_arm() so that it'll actually clear out the state in the hardware as well. Currently this won't do anything new for most of the intel_plane_disable_noatomic() calls since those are done before wm readout, and thus everything wm/ddb related in the state will still be zeroed anyway. The only difference will be for skl_dbuf_sanitize() is happens after wm readout. But I'll be reordering thigns so that wm readout happens earlier and at that point this will guarantee that we still clear out the old wm/ddb junk from the state. Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250306163420.3961-8-ville.syrjala@linux.intel.com
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@ -678,6 +678,8 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
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intel_set_plane_visible(crtc_state, plane_state, false);
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intel_set_plane_visible(crtc_state, plane_state, false);
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intel_plane_fixup_bitmasks(crtc_state);
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intel_plane_fixup_bitmasks(crtc_state);
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skl_wm_plane_disable_noatomic(crtc, plane);
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if ((crtc_state->active_planes & ~BIT(PLANE_CURSOR)) == 0 &&
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if ((crtc_state->active_planes & ~BIT(PLANE_CURSOR)) == 0 &&
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hsw_ips_disable(crtc_state)) {
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hsw_ips_disable(crtc_state)) {
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crtc_state->ips_enabled = false;
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crtc_state->ips_enabled = false;
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@ -3867,6 +3867,28 @@ void skl_wm_crtc_disable_noatomic(struct intel_crtc *crtc)
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memset(&crtc_state->wm.skl.ddb, 0, sizeof(crtc_state->wm.skl.ddb));
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memset(&crtc_state->wm.skl.ddb, 0, sizeof(crtc_state->wm.skl.ddb));
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}
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}
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void skl_wm_plane_disable_noatomic(struct intel_crtc *crtc,
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struct intel_plane *plane)
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{
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struct intel_display *display = to_intel_display(crtc);
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struct intel_crtc_state *crtc_state =
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to_intel_crtc_state(crtc->base.state);
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if (DISPLAY_VER(display) < 9)
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return;
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skl_ddb_entry_init(&crtc_state->wm.skl.plane_ddb[plane->id], 0, 0);
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skl_ddb_entry_init(&crtc_state->wm.skl.plane_ddb[plane->id], 0, 0);
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crtc_state->wm.skl.plane_min_ddb[plane->id] = 0;
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crtc_state->wm.skl.plane_interim_ddb[plane->id] = 0;
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memset(&crtc_state->wm.skl.raw.planes[plane->id], 0,
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sizeof(crtc_state->wm.skl.raw.planes[plane->id]));
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memset(&crtc_state->wm.skl.optimal.planes[plane->id], 0,
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sizeof(crtc_state->wm.skl.optimal.planes[plane->id]));
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}
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void intel_wm_state_verify(struct intel_atomic_state *state,
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void intel_wm_state_verify(struct intel_atomic_state *state,
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struct intel_crtc *crtc)
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struct intel_crtc *crtc)
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{
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{
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@ -42,6 +42,8 @@ void intel_wm_state_verify(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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struct intel_crtc *crtc);
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void skl_wm_crtc_disable_noatomic(struct intel_crtc *crtc);
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void skl_wm_crtc_disable_noatomic(struct intel_crtc *crtc);
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void skl_wm_plane_disable_noatomic(struct intel_crtc *crtc,
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struct intel_plane *plane);
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void skl_watermark_ipc_init(struct drm_i915_private *i915);
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void skl_watermark_ipc_init(struct drm_i915_private *i915);
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void skl_watermark_ipc_update(struct drm_i915_private *i915);
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void skl_watermark_ipc_update(struct drm_i915_private *i915);
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