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Merge "drivers: soc: msm_performance: Use pmu_lib to read pmu counters"
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@ -19,6 +19,7 @@
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#include <linux/kthread.h>
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#include <linux/sched/walt.h>
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#include <soc/qcom/msm_performance.h>
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#include <soc/qcom/pmu_lib.h>
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#include <linux/spinlock.h>
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#include <linux/circ_buf.h>
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#include <linux/ktime.h>
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@ -38,8 +39,6 @@
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#define INIT "Init"
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#define CPU_CYCLE_THRESHOLD 650000
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static DEFINE_PER_CPU(bool, cpu_is_idle);
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static DEFINE_PER_CPU(bool, cpu_is_hp);
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static DEFINE_MUTEX(perfevent_lock);
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@ -182,7 +181,7 @@ static struct queue_indicies curr_pos;
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static DEFINE_SPINLOCK(gfx_circ_buff_lock);
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struct event_data {
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struct perf_event *pevent;
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u32 event_id;
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u64 prev_count;
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u64 cur_delta;
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u64 cached_total_count;
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@ -551,29 +550,16 @@ static struct kobject *notify_kobj;
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/*******************************sysfs ends************************************/
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/*****************PMU Data Collection*****************/
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static struct perf_event_attr attr;
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static void msm_perf_init_attr(void)
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{
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memset(&attr, 0, sizeof(struct perf_event_attr));
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attr.type = PERF_TYPE_RAW;
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attr.size = sizeof(struct perf_event_attr);
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attr.pinned = 1;
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}
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static int set_event(struct event_data *ev, int cpu)
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{
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struct perf_event *pevent;
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int ret;
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pevent = perf_event_create_kernel_counter(&attr,
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cpu, NULL, NULL, NULL);
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if (IS_ERR(pevent)) {
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pr_err("msm_perf: %s failed, eventId:0x%x, cpu:%d, error code:%ld\n",
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__func__, attr.config, cpu, PTR_ERR(pevent));
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return PTR_ERR(pevent);
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ret = qcom_pmu_event_supported(ev->event_id, cpu);
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if (ret) {
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pr_err("msm_perf: %s failed, eventId:0x%x, cpu:%d, error code:%d\n",
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__func__, ev->event_id, cpu, ret);
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return ret;
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}
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ev->pevent = pevent;
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perf_event_enable(pevent);
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return 0;
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}
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@ -586,11 +572,6 @@ static void free_pmu_counters(unsigned int cpu)
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pmu_events[i][cpu].prev_count = 0;
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pmu_events[i][cpu].cur_delta = 0;
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pmu_events[i][cpu].cached_total_count = 0;
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if (pmu_events[i][cpu].pevent) {
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perf_event_disable(pmu_events[i][cpu].pevent);
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perf_event_release_kernel(pmu_events[i][cpu].pevent);
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pmu_events[i][cpu].pevent = NULL;
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}
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}
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}
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@ -603,7 +584,6 @@ static int init_pmu_counter(void)
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int i = 0, j = 0;
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int no_of_cpus = 0;
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msm_perf_init_attr();
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for_each_possible_cpu(cpu)
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no_of_cpus++;
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@ -626,12 +606,12 @@ static int init_pmu_counter(void)
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/* Create events per CPU */
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for_each_possible_cpu(cpu) {
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/* create Instruction event */
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attr.config = INST_EV;
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pmu_events[INST_EVENT][cpu].event_id = INST_EV;
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ret = set_event(&pmu_events[INST_EVENT][cpu], cpu);
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if (ret < 0)
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return ret;
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/* create cycle event */
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attr.config = CYC_EV;
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pmu_events[CYC_EVENT][cpu].event_id = CYC_EV;
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ret = set_event(&pmu_events[CYC_EVENT][cpu], cpu);
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if (ret < 0) {
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free_pmu_counters(cpu);
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@ -645,20 +625,25 @@ static int init_pmu_counter(void)
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return 0;
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}
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static inline void msm_perf_read_event(struct event_data *event)
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static inline void msm_perf_read_event(struct event_data *event, int cpu)
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{
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u64 ev_count = 0;
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u64 total, enabled, running;
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int ret;
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u64 total;
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mutex_lock(&perfevent_lock);
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if (!event->pevent) {
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if (!event->event_id) {
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mutex_unlock(&perfevent_lock);
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return;
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}
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if (!per_cpu(cpu_is_idle, event->pevent->cpu) &&
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!per_cpu(cpu_is_hp, event->pevent->cpu))
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total = perf_event_read_value(event->pevent, &enabled, &running);
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if (!per_cpu(cpu_is_hp, cpu)) {
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ret = qcom_pmu_read(cpu, event->event_id, &total);
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if (ret) {
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mutex_unlock(&perfevent_lock);
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return;
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}
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}
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else
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total = event->cached_total_count;
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@ -681,9 +666,9 @@ static ssize_t get_cpu_total_instruction(struct kobject *kobj,
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for_each_possible_cpu(cpu) {
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/* Read Instruction event */
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msm_perf_read_event(&pmu_events[INST_EVENT][cpu]);
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msm_perf_read_event(&pmu_events[INST_EVENT][cpu], cpu);
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/* Read Cycle event */
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msm_perf_read_event(&pmu_events[CYC_EVENT][cpu]);
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msm_perf_read_event(&pmu_events[CYC_EVENT][cpu], cpu);
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instruction = pmu_events[INST_EVENT][cpu].cur_delta;
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cycles = pmu_events[CYC_EVENT][cpu].cur_delta;
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/* collecting max inst and ipc for max cap and min cap cpus */
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@ -707,37 +692,11 @@ static ssize_t get_cpu_total_instruction(struct kobject *kobj,
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return cnt;
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}
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static int restart_events(unsigned int cpu, bool cpu_up)
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{
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int ret = 0;
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msm_perf_init_attr();
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if (cpu_up) {
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/* create Instruction event */
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attr.config = INST_EV;
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ret = set_event(&pmu_events[INST_EVENT][cpu], cpu);
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if (ret < 0)
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return ret;
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/* create cycle event */
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attr.config = CYC_EV;
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ret = set_event(&pmu_events[CYC_EVENT][cpu], cpu);
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if (ret < 0) {
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free_pmu_counters(cpu);
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return ret;
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}
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} else {
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free_pmu_counters(cpu);
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}
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return 0;
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}
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static int hotplug_notify_down(unsigned int cpu)
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{
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mutex_lock(&perfevent_lock);
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per_cpu(cpu_is_hp, cpu) = true;
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restart_events(cpu, false);
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free_pmu_counters(cpu);
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mutex_unlock(&perfevent_lock);
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return 0;
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@ -748,7 +707,6 @@ static int hotplug_notify_up(unsigned int cpu)
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unsigned long flags;
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mutex_lock(&perfevent_lock);
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restart_events(cpu, true);
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per_cpu(cpu_is_hp, cpu) = false;
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mutex_unlock(&perfevent_lock);
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@ -762,31 +720,6 @@ static int hotplug_notify_up(unsigned int cpu)
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return 0;
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}
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static int msm_perf_idle_read_events(unsigned int cpu)
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{
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int ret = 0, i;
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for (i = 0; i < NO_OF_EVENT; i++) {
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if (pmu_events[i][cpu].pevent)
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ret = perf_event_read_local(pmu_events[i][cpu].pevent,
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&pmu_events[i][cpu].cached_total_count, NULL, NULL);
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}
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return ret;
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}
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static void msm_perf_idle_notif(void *unused, unsigned int state,
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unsigned int cpu)
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{
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if (state == PWR_EVENT_EXIT) {
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__this_cpu_write(cpu_is_idle, false);
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} else {
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__this_cpu_write(cpu_is_idle, true);
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if (!per_cpu(cpu_is_hp, cpu))
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msm_perf_idle_read_events(cpu);
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}
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}
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static int events_notify_userspace(void *data)
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{
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unsigned long flags;
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@ -1224,7 +1157,6 @@ static int __init msm_performance_init(void)
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init_notify_group();
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init_pmu_counter();
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register_trace_cpu_idle(msm_perf_idle_notif, NULL);
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return 0;
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}
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MODULE_LICENSE("GPL v2");
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