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KVM: x86: Rename kvm_{g,s}et_msr()* to show that they emulate guest accesses
Rename
kvm_{g,s}et_msr_with_filter()
kvm_{g,s}et_msr()
to
kvm_emulate_msr_{read,write}
__kvm_emulate_msr_{read,write}
to make it more obvious that KVM uses these helpers to emulate guest
behaviors, i.e., host_initiated == false in these helpers.
Suggested-by: Sean Christopherson <seanjc@google.com>
Suggested-by: Chao Gao <chao.gao@intel.com>
Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Chao Gao <chao.gao@intel.com>
Tested-by: Mathias Krause <minipli@grsecurity.net>
Tested-by: John Allen <john.allen@amd.com>
Signed-off-by: Chao Gao <chao.gao@intel.com>
Tested-by: Rick Edgecombe <rick.p.edgecombe@intel.com>
Link: https://lore.kernel.org/r/20250812025606.74625-2-chao.gao@intel.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
This commit is contained in:
parent
d90ebf5a06
commit
d2dcf25a4c
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@ -2154,11 +2154,11 @@ void kvm_prepare_event_vectoring_exit(struct kvm_vcpu *vcpu, gpa_t gpa);
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void kvm_enable_efer_bits(u64);
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bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
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int kvm_get_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 *data);
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int kvm_set_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 data);
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int kvm_emulate_msr_read(struct kvm_vcpu *vcpu, u32 index, u64 *data);
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int kvm_emulate_msr_write(struct kvm_vcpu *vcpu, u32 index, u64 data);
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int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
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int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
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int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
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int __kvm_emulate_msr_read(struct kvm_vcpu *vcpu, u32 index, u64 *data);
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int __kvm_emulate_msr_write(struct kvm_vcpu *vcpu, u32 index, u64 data);
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int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
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int kvm_emulate_rdmsr_imm(struct kvm_vcpu *vcpu, u32 msr, int reg);
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int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
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@ -529,7 +529,7 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt,
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vcpu->arch.smbase = smstate->smbase;
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if (kvm_set_msr(vcpu, MSR_EFER, smstate->efer & ~EFER_LMA))
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if (__kvm_emulate_msr_write(vcpu, MSR_EFER, smstate->efer & ~EFER_LMA))
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return X86EMUL_UNHANDLEABLE;
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rsm_load_seg_64(vcpu, &smstate->tr, VCPU_SREG_TR);
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@ -620,7 +620,7 @@ int emulator_leave_smm(struct x86_emulate_ctxt *ctxt)
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/* And finally go back to 32-bit mode. */
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efer = 0;
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kvm_set_msr(vcpu, MSR_EFER, efer);
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__kvm_emulate_msr_write(vcpu, MSR_EFER, efer);
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}
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#endif
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@ -997,7 +997,7 @@ static u32 nested_vmx_load_msr(struct kvm_vcpu *vcpu, u64 gpa, u32 count)
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__func__, i, e.index, e.reserved);
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goto fail;
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}
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if (kvm_set_msr_with_filter(vcpu, e.index, e.value)) {
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if (kvm_emulate_msr_write(vcpu, e.index, e.value)) {
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pr_debug_ratelimited(
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"%s cannot write MSR (%u, 0x%x, 0x%llx)\n",
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__func__, i, e.index, e.value);
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@ -1033,7 +1033,7 @@ static bool nested_vmx_get_vmexit_msr_value(struct kvm_vcpu *vcpu,
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}
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}
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if (kvm_get_msr_with_filter(vcpu, msr_index, data)) {
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if (kvm_emulate_msr_read(vcpu, msr_index, data)) {
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pr_debug_ratelimited("%s cannot read MSR (0x%x)\n", __func__,
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msr_index);
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return false;
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@ -2770,8 +2770,8 @@ static int prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
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if ((vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL) &&
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kvm_pmu_has_perf_global_ctrl(vcpu_to_pmu(vcpu)) &&
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WARN_ON_ONCE(kvm_set_msr(vcpu, MSR_CORE_PERF_GLOBAL_CTRL,
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vmcs12->guest_ia32_perf_global_ctrl))) {
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WARN_ON_ONCE(__kvm_emulate_msr_write(vcpu, MSR_CORE_PERF_GLOBAL_CTRL,
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vmcs12->guest_ia32_perf_global_ctrl))) {
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*entry_failure_code = ENTRY_FAIL_DEFAULT;
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return -EINVAL;
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}
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@ -4758,8 +4758,8 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu,
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}
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if ((vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL) &&
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kvm_pmu_has_perf_global_ctrl(vcpu_to_pmu(vcpu)))
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WARN_ON_ONCE(kvm_set_msr(vcpu, MSR_CORE_PERF_GLOBAL_CTRL,
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vmcs12->host_ia32_perf_global_ctrl));
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WARN_ON_ONCE(__kvm_emulate_msr_write(vcpu, MSR_CORE_PERF_GLOBAL_CTRL,
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vmcs12->host_ia32_perf_global_ctrl));
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/* Set L1 segment info according to Intel SDM
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27.5.2 Loading Host Segment and Descriptor-Table Registers */
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@ -4937,7 +4937,7 @@ static void nested_vmx_restore_host_state(struct kvm_vcpu *vcpu)
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goto vmabort;
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}
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if (kvm_set_msr_with_filter(vcpu, h.index, h.value)) {
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if (kvm_emulate_msr_write(vcpu, h.index, h.value)) {
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pr_debug_ratelimited(
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"%s WRMSR failed (%u, 0x%x, 0x%llx)\n",
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__func__, j, h.index, h.value);
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@ -1933,33 +1933,33 @@ static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
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__kvm_get_msr);
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}
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int kvm_get_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 *data)
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int kvm_emulate_msr_read(struct kvm_vcpu *vcpu, u32 index, u64 *data)
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{
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if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
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return KVM_MSR_RET_FILTERED;
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return kvm_get_msr_ignored_check(vcpu, index, data, false);
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}
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EXPORT_SYMBOL_GPL(kvm_get_msr_with_filter);
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EXPORT_SYMBOL_GPL(kvm_emulate_msr_read);
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int kvm_set_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 data)
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int kvm_emulate_msr_write(struct kvm_vcpu *vcpu, u32 index, u64 data)
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{
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if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
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return KVM_MSR_RET_FILTERED;
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return kvm_set_msr_ignored_check(vcpu, index, data, false);
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}
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EXPORT_SYMBOL_GPL(kvm_set_msr_with_filter);
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EXPORT_SYMBOL_GPL(kvm_emulate_msr_write);
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int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
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int __kvm_emulate_msr_read(struct kvm_vcpu *vcpu, u32 index, u64 *data)
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{
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return kvm_get_msr_ignored_check(vcpu, index, data, false);
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}
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EXPORT_SYMBOL_GPL(kvm_get_msr);
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EXPORT_SYMBOL_GPL(__kvm_emulate_msr_read);
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int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
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int __kvm_emulate_msr_write(struct kvm_vcpu *vcpu, u32 index, u64 data)
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{
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return kvm_set_msr_ignored_check(vcpu, index, data, false);
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}
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EXPORT_SYMBOL_GPL(kvm_set_msr);
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EXPORT_SYMBOL_GPL(__kvm_emulate_msr_write);
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static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
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{
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@ -2040,7 +2040,8 @@ static int __kvm_emulate_rdmsr(struct kvm_vcpu *vcpu, u32 msr, int reg,
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u64 data;
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int r;
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r = kvm_get_msr_with_filter(vcpu, msr, &data);
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r = kvm_emulate_msr_read(vcpu, msr, &data);
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if (!r) {
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trace_kvm_msr_read(msr, data);
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@ -2080,7 +2081,7 @@ static int __kvm_emulate_wrmsr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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{
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int r;
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r = kvm_set_msr_with_filter(vcpu, msr, data);
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r = kvm_emulate_msr_write(vcpu, msr, data);
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if (!r) {
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trace_kvm_msr_write(msr, data);
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} else {
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@ -8366,7 +8367,7 @@ static int emulator_get_msr_with_filter(struct x86_emulate_ctxt *ctxt,
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struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
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int r;
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r = kvm_get_msr_with_filter(vcpu, msr_index, pdata);
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r = kvm_emulate_msr_read(vcpu, msr_index, pdata);
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if (r < 0)
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return X86EMUL_UNHANDLEABLE;
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@ -8389,7 +8390,7 @@ static int emulator_set_msr_with_filter(struct x86_emulate_ctxt *ctxt,
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struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
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int r;
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r = kvm_set_msr_with_filter(vcpu, msr_index, data);
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r = kvm_emulate_msr_write(vcpu, msr_index, data);
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if (r < 0)
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return X86EMUL_UNHANDLEABLE;
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@ -8409,7 +8410,7 @@ static int emulator_set_msr_with_filter(struct x86_emulate_ctxt *ctxt,
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static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
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u32 msr_index, u64 *pdata)
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{
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return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
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return __kvm_emulate_msr_read(emul_to_vcpu(ctxt), msr_index, pdata);
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}
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static int emulator_check_rdpmc_early(struct x86_emulate_ctxt *ctxt, u32 pmc)
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