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iommu/arm-smmu-v3: Standardize ATS enablement failure reporting

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Update arm_smmu_enable_ats() to wrap the pci_enable_ats() call in a
WARN(). Since probe-time checks now preclude configuration errors
any failure during hardware enablement is considered a kernel bug.

Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Samiullah Khawaja <skhawaja@google.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Pranjal Shrivastava <praan@google.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
This commit is contained in:
Pranjal Shrivastava 2026-06-15 23:50:36 +00:00 committed by Joerg Roedel
parent 6fd7c5c81a
commit d23da7b8d6
1 changed files with 7 additions and 2 deletions
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9
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
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@ -2956,8 +2956,13 @@ static void arm_smmu_enable_ats(struct arm_smmu_master *master)
* ATC invalidation of PASID 0 causes the entire ATC to be flushed.
*/
arm_smmu_atc_inv_master(master, IOMMU_NO_PASID);
if (pci_enable_ats(pdev, stu))
dev_err(master->dev, "Failed to enable ATS (STU %zu)\n", stu);
/*
* Since pci_prepare_ats() has already verified the HW capability
* and programmed the STE, pci_enable_ats() should not fail here.
*/
WARN(pci_enable_ats(pdev, stu),
"%s: Failed to enable ATS (STU %zu)\n", dev_name(master->dev), stu);
}
static int arm_smmu_enable_pasid(struct arm_smmu_master *master)